pxb4219 Infineon Technologies Corporation, pxb4219 Datasheet - Page 104

• Manufacturer Part Number: pxb4219
• Description: Iwe8 Interworking Element For 8 E1/t1 Lines
• Manufacturer: Infineon Technologies Corporation

5.1.3.2
In SYM8 mode the framer interface is clocked with an 8.192 MHz clock connected to
RFCLK. The mode is enabled by setting bit om = 10
All timeslots (transmit and receive) will be aligned to each other.
FRCLK[0:7]
FRDAT[0:7]
FRMFB[0:7]
FRFRS[0:7]
FRLOS[0:7]
FTCKO[0:7]
FTDAT[0:7]
FTMFS[0:7]
Data Sheet
Synchronous Mode at 8.192 MHz (SYM8)
Framer Receive Clock
Unused
Framer Receive Data
FRDAT is sampled in the middle of the bit period on the falling
edge of RFCLK
Framer Receive Multiframe Begin
Depending on bits p_ces in pcfN:
0 =
1 =
depending on bit “rfpp” in “opmo”:
0 =
1 =
depending on bit “symn” in “opmo”:
0 =
1 =
FRMFB is always sampled with the opposite clock-edge of
FRDAT.
Framer Receive Frame Synchronization Pulse
Unused
Framer Receive Loss of Signalling
Framer Transmit Clock
Unused
Framer Transmit Data
FTDAT is clocked with the falling edge of RFCLK:
Framer Transmit Multiframe Synchronization
Unused
Structured CES: A pulse on this pin designates the
first frame of a new multiframe
Unstructured CES: Unused
FRMFB is active low
FRMFB is active high
FRMFB[0] is used for frame and multiframe
synchronization in receive and transmit direction of
all ports. FRMFB[1:7] are unused
FRMFB[N] is used for frame and multiframe
synchronization in receive and transmit direction of
corresponding ports
104
PXB4219 / PXB4220 / PXB4221
B
in “opmo”, see
Interface Description
Chapter 7.24
2002-05-06