pxb4219 Infineon Technologies Corporation, pxb4219 Datasheet - Page 34

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pxb4219

Manufacturer Part Number
pxb4219
Description
Iwe8 Interworking Element For 8 E1/t1 Lines
Manufacturer
Infineon Technologies Corporation
Datasheet
Table 6
Pin No.
L18
W14
2.2.7
Table 7
Pin No.
D2
E4
C1
D1
E3
V3
A11
Y15
V18
Data Sheet
Test Interface
Symbol
RMADC
RMCLK
Symbol
TDO
TDI
TCK
TMS
TRST
TSCEN
TSCSH
PMT
TBUS
External RAM Interface (cont’d)
Test Interface
Input (I)
Output (O)
O
Tri
I
PUA
I
PUA
I
PUA
I
PDA
I
PDA
PDA
Input (I)
Output (O)
O
Tri
O
Tri
Function
Boundary Scan Test Data Output
Boundary Scan Test Data Input
Boundary Scan Test Clock
Boundary Scan Test Mode Select
0 = normal operation
1 = Enable boundary scan test mode
Boundary Scan Test Reset
Internal Test Pins
TSCEN and TSCSH must be low for proper
operation
Internal Test Pins
00 = Intel mode
01 = prohibited
10 = prohibited
11 = Motorola Mode
34
Function
RAM Address Control
This output is asserted to indicate a valid
address on RMADR[15:0]
RAM Clock
Clock output for the external RAM. It runs at
the same frequency as CLOCK input
PXB4219 / PXB4220 / PXB4221
Pin Descriptions
2002-05-06

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