pxb4219 Infineon Technologies Corporation, pxb4219 Datasheet - Page 93

no-image

pxb4219

Manufacturer Part Number
pxb4219
Description
Iwe8 Interworking Element For 8 E1/t1 Lines
Manufacturer
Infineon Technologies Corporation
Datasheet
5
5.1
The selection of the Echo Canceller mode is done via an external pin (Pin EC = 0).
In standard mode (Pin EC = 1), 4 sub modes can be selected via the “om” bits in the
Operation Mode Register (“opmo”, see
• FALC mode (FAM)
• Generic Interface mode (GIM)
• Synchronous mode with an external reference clock of 8 MHz (SYM8)
• Synchronous mode with an external reference clock of 2 MHz (SYM2)
Depending on the level of the E1/T1 pin FAM and GIM can run based on E1 or T1
frames. SYM2 and SYM8 will always use E1 frame formats.
A clock selector for the Framer transmit clock is integrated in the IWE8. Depending on
bits “ftckn” in the FT Clock Select Register (“ftcs”, see
the following clocks is done:
• the line clock FRCLK
• the SRTS regenerated clock from internal or external clock recovery circuit
• the clock derived from the external reference clock (pin RFCLK).
The data on the Generic Framer Interface is structured in frames repeated every 125µs.
Each frame is divided into timeslots, where the least sigificant slot is transmitted first. The
data bits in each slot are transmitted starting with the most significant bit.
5.1.1
The IWE8 can be directly connected to Infineon’s “Framer and Line interface
components” (FALC) as shown in
Figure 22
Data Sheet
Interface Description
Generic Framer Interface
FALC Mode (FAM)
Connection of IWE8 to QuadFALC
QuadFALC
FREEZE
SCLKR
SCLKX
RMFB
XMFS
SYPR
SYPX
RDO
TM
XDI
Figure
Chapter
22.
93
7.24)
PXB4219 / PXB4220 / PXB4221
Chapter
FRCLKn
FRDATn
FRFRSn
FRMFBn
FRLOSn
FTMFSn
FTFRSn
FTDATn
FTCKOn
IWE8
7.25) selection between
Interface Description
2002-05-06

Related parts for pxb4219