pxb4219 Infineon Technologies Corporation, pxb4219 Datasheet - Page 144

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pxb4219

Manufacturer Part Number
pxb4219
Description
Iwe8 Interworking Element For 8 E1/t1 Lines
Manufacturer
Infineon Technologies Corporation
Datasheet
MPADR[17:0]
2603B
26024
26023
26022
26021
26020
The ATM header to be used for cell insertion has to be programmed at
MPADR = 26020
The format of the ATM Header entry is as follows:
6.2.6
Read/write Address 26040
Reset value: Not applicable. RAM must be reset and initialized via SW
Memory size: 8127 × 32 bits: 254 cells x 16 doublewords
RMADR
MPADR
Data Sheet
31
23
15
7
H
H
H
H
H
H
GFC[3:0] or VPI[11:8]
Cell Extraction Buffer
17 16 15 14 13 12 11 10 9
1
15 14 13 12 11 10 9
0
H
VCI[3:0]
VPI[3:0]
.
0
1
H
1
to 27FFF
ATM Cell Payload
ATM Header
Not Used
VCI[11:4]
H
cell_nr[7:0] + 2
144
8
7
8
PXB4219 / PXB4220 / PXB4221
6
7
PTI[2:0]
5
6
VCI[15:12]
VPI[7:4]
4
5
3
4
Memory Structure
double_word
RMADR[15:0]
301D
3012
3011
3010
2
3
[3:0]
H
H
H
H
1
2
2002-05-06
CLP
0
1
24
16
8
0
0
0

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