pxb4219 Infineon Technologies Corporation, pxb4219 Datasheet - Page 117

• Manufacturer Part Number: pxb4219
• Description: Iwe8 Interworking Element For 8 E1/t1 Lines
• Manufacturer: Infineon Technologies Corporation

5.6
The IWE8 needs to be connected to an external synchronous SRAM of 64k x 33 bits with
parity protection or 64k x 32 bits without parity protection.
For proper operation FT (Flow Through) SSRAM is needed. Pipelined SSRAM can not
be used, as this type has additional registered outputs.
A possible connection with 1 SRAM 64k x 36 component is shown in
.
Figure 34
The IWE8 has a fixed RAM interface cycle of 12 clock periods. A sequence of
6 consecutive read cycles (addresses AR1 to AR6), a dummy address cycle and
5 consecutive write cycles (addresses AW1 to AW5) is continuously repeated. The
timing of RMADC and RMOE is always fixed as shown in
reads data from the external RAM or writes data into the external RAM is controlled by
the RMCS and RMWR signals. In
IWE8, and data W1 and W3 are actually written into the external RAM.
Figure 35
Data Sheet
External RAM Interface
External RAM Connection
RAM Interface Protocol
RMCLK
RMADR
RMADC
RMOE
RMDAT
RMWR
RMCS
W5
IWE8
W5
RMADR[0-15]
RMDAT[0-32]
R1
RMADC
RMCLK
RMWR
R2
R1
RMOE
RMCS
R3
R2
Figure
R4
R3
R5
R4
117
35, data R1 and R3 are actually read by the
RAM cycle
R6
R5
R6
PXB4219 / PXB4220 / PXB4221
W1 W2 W3 W4 W5
W1 W2 W3 W4 W5
CLK
A[0-15]
CS
WR
OE
ADSC
D[0-35]
SRAM 64K x 36
Figure
Interface Description
35. Whether the IWE8
Figure
R1
34.
2002-05-06