pxb4219 Infineon Technologies Corporation, pxb4219 Datasheet - Page 48

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pxb4219

Manufacturer Part Number
pxb4219
Description
Iwe8 Interworking Element For 8 E1/t1 Lines
Manufacturer
Infineon Technologies Corporation
Datasheet
• the receiver must subtract (equal to add modulo 2) the same pattern from the 8 HEC
As an example, if the first 4 octets of the header were all zeros the generated header
before scrambling would be “00000000_00000000_00000000_00000000_01010101”.
The starting value for the polynomial check is 0s (binary)
The coset value is programmable in the ATM Control Register (“atmc”, see
Chapter
4.1.2
Each ATM transmit port can be configured in the “channel_mode” field of the “ATM
Transmit Reference Slot” in RAM2 to operate in “Inactive”, “Active” or “Standby” mode.
In “Inactive” mode, byte-pattern 0 “bp0” is continuously sent to the framer transmit
interface.
In “Active” mode, user cells or idle/unassigned cells are sent to the framer transmit
interface.
In “Standby” mode, only idle/unassigned cells are sent to the framer transmit interface.
When activating ATM transmit ports, it is important to follow the initialization sequence
as shown in
transmit port. During this time the device connected to the Framer Receive Interface has
to be in normal operation allowing the IWE8 to synchronize itself on the frame pulse.
Table 13
Step
1
2
3
Data Sheet
bits before calculating the syndrome of the header.
pcfN.
p_tx_act
0 = inactive
1 = active
1 = active
7.8).
Setup of ATM Transmit Ports
Table
Activation sequence for ATM transmit ports
13. Step 2 must be held at least 250 µ s to internally reset the ATM
ATM Transmit Reference Slot.
channel_mode
00 = Inactive
00 = Inactive
01 or 11 = Active
48
PXB4219 / PXB4220 / PXB4221
Operational Description
Minimum Time
250 µ s
2002-05-06

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