pxb4219 Infineon Technologies Corporation, pxb4219 Datasheet - Page 98
![no-image](/images/no-image-200.jpg)
pxb4219
Manufacturer Part Number
pxb4219
Description
Iwe8 Interworking Element For 8 E1/t1 Lines
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PXB4219.pdf
(290 pages)
- Current page: 98 of 290
- Download datasheet (4Mb)
FTDAT[0:7]
FTMFS[0:7]
FTFRS[0:7]
RFCLK
Data Sheet
10 =
11 =
Framer Transmit Data
depending on bit “ftri” in “opmo”:
0 =
1 =
Framer Transmit Multiframe Synchronization
Depending on bit p_ces in pcfN:
0 =
1 =
Depending on bit “tfpp” in “opmo”:
0 =
1 =
Framer Transmit Frame Synchronization Pulse
FTFRS is asserted synchronously to the transmission of the F-bit
of each frame.
Reference Clock
• Reference clock for the internal clock recovery circuit
• Depending on p_rx_em in pcfN: Optional emergency clock if
no transition on FRCLK is detected within 23 CLOCK cycles.
The segmentation continues using the RFCLK divided by four,
and using the byte-pattern programmed to a_emg_bpslct in
acfg for the cell payload.
Clock derived from RFCLK
No clock
FTDAT is clocked with the falling edge of FTCKO
FTDAT is clocked with the rising edge of FTCKO
Structured CES: Depending on “p_tx_mfs” in
“pcfN”:
0 = Superframe frame mode: FTMFS is asserted
every 12 frames (1.5 ms)
1 = Extended superframe mode: FTMFS is
asserted every 24 frames (3 ms)
Unstructured CES: Inactive level
FTMFS is active low
FTMFS is active high
98
PXB4219 / PXB4220 / PXB4221
Interface Description
2002-05-06
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