pxb4219 Infineon Technologies Corporation, pxb4219 Datasheet - Page 128
![no-image](/images/no-image-200.jpg)
pxb4219
Manufacturer Part Number
pxb4219
Description
Iwe8 Interworking Element For 8 E1/t1 Lines
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PXB4219.pdf
(290 pages)
- Current page: 128 of 290
- Download datasheet (4Mb)
x43_scram
bling
channel_
mode
ref_slot
Note: RAM slot 1 has always to be configured always as reference slot.
Note: To allow IWE8 internal initialization, all channels must remain in inactive mode for
6.1.2.2
Read/write Address 00400
Reset value: Not applicable. RAM must be reset and initialized via SW.
Data Sheet
31
23
15
7
at least 250 µ s after activation of the port (i.e. setting pcfN[p_tx_act] = 1). During
this time the device connected to the Framer Transmit Interface has to be in
normal operation.
RAM2: ATM Transmit Continuation Slot
ATM cell payload scrambling enable
0 =
1 =
Channel mode
00 =
01 =
10 =
11 =
Reference slot indicator
1 =
Not used
Disabled
Enabled
Inactive mode
Active mode (normal mode)
Standby mode
Active mode (normal mode)
This slot is a reference slot
H
to 005FF
Not used
Not used
Not used
H
128
scram-
x43_
bling
PXB4219 / PXB4220 / PXB4221
channel_mode[1:0]
Memory Structure
2002-05-06
ref_slot
= 1
24
16
8
0
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