m5m51016btp Renesas Electronics Corporation., m5m51016btp Datasheet - Page 159
m5m51016btp
Manufacturer Part Number
m5m51016btp
Description
Renesas 16-bit Single-chip Microcomputer M16c Family / M16c/20 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.M5M51016BTP.pdf
(367 pages)
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M30245 Group
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
2.8.3 USB Interrupt
The USB related interrupts include USB suspend interrupt, USB resume interrupt, USB reset interrupt,
USB endpoint 0 interrupt, USB function interrupt, and USB SOF interrupt.
(1) Related Registers
This register is used to judge the USB function interrupt factor. This is the read-only register which
indicates each interrupt request state of endpoint x(x=1~4) IN interrupt, endpoint x(x=1~4) OUT inter-
rupt, and error interrupt. On occurrence of an interrupt request, this is set to “1”. Each interrupt status
flag can be cleared to “0” by setting “1” to the corresponding bit of USB function interrupt clear register.
• Endpoint 1 IN Interrupt Status Flag
• Endpoint 2 IN Interrupt Status Flag
• Endpoint 3 IN Interrupt Status Flag
• Endpoint 4 IN Interrupt Status Flag
• Endpoint 1 OUT Interrupt Status Flag
• Endpoint 2 OUT Interrupt Status Flag
• Endpoint 3 OUT Interrupt Status Flag
• Endpoint 4 OUT Interrupt Status Flag
• Error Interrupt Status Flag
USB function interrupt status register
These flags indicate endpoint x(x=1~4) IN interrupt request state, respectively. These flags are set to
“1” at the corresponding endpoint that has been enabled by USB function interrupt enable register in
the following cases:
These each indicate endpoint x(x=1~4) OUT interrupt request state. When a data is successfully
received, these flags are set to “1” at the corresponding endpoint.
This flag indicates that an error has been occurred at the endpoint x(x=0~4). This flag is set to “1” in
the following cases:
- The endpoint is enabled from a disabled state
- One buffer data is successfully transmitted
- Buffer flush has been executed by either AUTO_FLUSH or FLUSH bit (bit 6 at address EPxICS)
- The EP0CSR4 (FORCE_STALL) flag of endpoint 0 is set to “1”
- The EP0CSR5 (SETUP_END) flag of endpoint 0 is set to “1”
- The INxCSR2 (UNDER_RUN) flag of endpoint 1 to 4 IN is set to “1”
- The OUTxCSR2 (OVER_RUN) flag of endpoint 1 to 4 OUT is set to “1”
- The OUTxCSR3 (FORCE_STALL) flag of endpoint 1 to 4 OUT is set to “1”
- The OUTxCSR4 (DATA_ERR) flag of endpoint 1 to 4 OUT is set to “1”
being set to “1” while buffer data exists in the IN FIFO.
page 150 of 354
2. USB function
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