m5m51016btp Renesas Electronics Corporation., m5m51016btp Datasheet - Page 285

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m5m51016btp

Manufacturer Part Number
m5m51016btp
Description
Renesas 16-bit Single-chip Microcomputer M16c Family / M16c/20 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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M30245 Group
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
(3) Returning from stop mode
(4) Returning form wait mode
(5) BCLK in returning from wait mode or stop mode
The stop mode can be canceled by hardware reset, or by generating an interrupt request. If an inter-
rupt is to be used to cancel stop mode, that interrupt must first have been enabled and the priority level
of the interrupt not to be used for clearing must be set to level 0 before changing to stop mode.
If an interrupt is used to cancel stop mode, that interrupt routine is processed. If only a hardware reset
and NMI interrupt are used to cancel stop mode, the priority level of all interrupts must be set to level
0 before changing to stop mode.
When changing from high-speed/medium mode to stop mode and at reset, the main clock division
select bit 0 (bit 6 at address 0006
tion mode, the value before stop mode is retained.
The wait mode can be canceled by hardware reset, or by generating an interrupt request. If an inter-
rupt is to be used to cancel wait mode, that interrupt must first have been enabled and the priority level
of the interrupt not to be used for clearing must be set to level 0 before changing to wait mode.
If an interrupt is used to cancel wait mode, the microcomputer selects the clock used when the WAIT
instruction is executed for BCLK and restarts operating in that interrupt routine. If only a hardware
reset or NMI interrupt will be used to cancel wait mode, the priority level of all interrupts must be set to
level 0 before changing to stop mode.
Table 2.16.1 shows the interrupts that can be used for canceling stop mode and wait mode.
(a) Returning from wait mode
(b) Returning from stop mode
The processor immediately returns to the BCLK, which was in use before entering wait mode.
CM06 is set to “1” when the device enters stop mode after selecting the main clock for BCLK. CM17
and CM16 do not change state. In this case, when restored from stop mode, the device starts oper-
ating in divided-by-8 mode.
When the device enters stop mode after selecting the subclock for BCLK, CM06, CM17, CM16, and
CM07 all do not change state. In this case, when restored from stop mode, the device starts operat-
ing in low-speed mode.
page 276 of 354
16
) is set to “1”. When changing from low-speed/low power dissipa-
2. Power Control

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