m5m51016btp Renesas Electronics Corporation., m5m51016btp Datasheet - Page 240

• Manufacturer Part Number: m5m51016btp
• Description: Renesas 16-bit Single-chip Microcomputer M16c Family / M16c/20 Series
• Manufacturer: Renesas Electronics Corporation.

M30245 Group
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
Table 2.9.8. Relationship of the successive comparison register contents and Vref
2.9.9 Method of A/D Conversion (10-bit mode)
Successive approximation register : n
(1) The A/D converter compares the reference voltage (Vref) generated internally based on the
contents of the successive comparison register with the analog input voltage (V
the analog input pin. The comparison result is stored in the successive comparison register
and then V
curs, the A/D converter carries out the following:
Vref is generated based on the latest content of the successive comparison register. Table
2.9.8 shows the relationship of the successive comparison register contents and Vref. Table
2.9.9 shows how the successive comparison register and Vref vary while A/D conversion is in
progress. Figure 2.9.18 shows theoretical A/D conversion characteristics.
1. Fixes bit 9 of the successive comparison register.
2. Fixes bit 8 of the successive comparison register.
3. Fixes bit 7 through bit 0 of the successive comparison register.
page 231 of 354
Compares Vref with V
register are “1000000000
Bit 9 of the successive comparison register varies depending on the comparison re-
sult as follows.
Sets bit 8 of the successive comparison register to “1”, then compares Vref with V
Bit 8 of the successive comparison register varies depending on the comparison
result as follows:
Carries out step 2 above on bit 7 through bit 0.
After bit 0 is fixed, the contents of the successive comparison register (conversion
result) are transmitted to AD register i.
1 to1023
If Vref < V
If Vref > V
If Vref < V
If Vref > V
IN
0
is converted to digital value (successive comparison method). If a trigger oc-
IN
IN
IN
IN
, then “1” is assigned to bit 9.
, then “0” is assigned to bit 9.
, then “1” is assigned to bit 8.
, then “0” is assigned to bit 8.
IN
: [In this instance, the contents of the successive comparison
2
” (default).]
1024
V
REF
x
Vref (V)
0
n
–
V
2048
REF
2. A/D Converter
IN
) input from
IN
.