m5m51016btp Renesas Electronics Corporation., m5m51016btp Datasheet - Page 221

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m5m51016btp

Manufacturer Part Number
m5m51016btp
Description
Renesas 16-bit Single-chip Microcomputer M16c Family / M16c/20 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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M30245 Group
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
(3) Register, Bit
(4) Packet Data Destruction
•When the USB reset interrupt request occurs, all the USB internal registers become reset state. To
•All the USB related registers (16-bit registers) except USB endpoint x(x=0 to 4) IN FIFO data register
•While the USB clock is held disabled in suspend mode, writing in the USB internal registers (other
•When FLUSH bit of endpoint x OUT control and status register (EPxOCS) is set to “1” during USB
•When FLUSH bit of USB endpoint x IN control and status register (EPxICS) is set to “1” during USB
resume communication, each endpoint needs to be initialized.
(EPxI), USB endpoint x(x=0 to 4) OUT FIFO data register (EPxO), USB control register (USBC), and
USB attach/detach register (USBAD) are available for word access and byte access. The EPxI and
the EpxO are only available for word access or byte access to the lower bytes. The USBC and the
USBAD of 8-bit registers are only available for byte access. After software reset, contents of all the
USB related registers are retained.
than USBC, USBAD, and frequency synthesizer-related registers) is disabled.
transfer, the receive data may be destroyed. Be sure to set FLUSH bit of the EPxOCS to “1” only
when there are data in OUT FIFO (OUT_BUF_STS1 and OUT_BUF_STS0 are set to “10
transfer, the transmit data may be destroyed. Be sure to read the IN_BUF_STS1 and the
IN_BUF_STS0 flags and to confirm that there are data in IN FIFO before setting FLUSH bit of the
EPxICS to “1”.
In isochronous transfer, use AUTO_FLUSH bit (bit 0 of address 028C
page 212 of 354
16
).
2. USB function
2
” or “11
2
”).

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