m5m51016btp Renesas Electronics Corporation., m5m51016btp Datasheet - Page 164

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m5m51016btp

Manufacturer Part Number
m5m51016btp
Description
Renesas 16-bit Single-chip Microcomputer M16c Family / M16c/20 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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M30245 Group
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
(3) USB Function Interrupt
The USB function interrupts include the endpoint x(x=1~4) IN interrupt, endpoint x(x=1~4) OUT inter-
rupt, and error interrupt. An interrupt request occurs on completion of data transmit/receive or on
occurrence of an error such as overrun/underrun, setting the status flag which is the factor of the
interrupt request inside USB function interrupt status register to “1”. When using the USB function
interrupt, set the interrupt priority level at USB function interrupt control register (address 005D
the corresponding bit of USB function interrupt enable register to “1”.
The USB function interrupt involves multiple interrupt request factors. Therefore, during processing of
the USB function interrupt, an interrupt request may occur newly and the interrupt status flag can be
changed by it. When performing USB function interrupt processing, be sure to first save contents of
interrupt status register and to clear the status flag. Then, process the interrupt request that has
occurred when the interrupt process has been received based on the saved data value.
In the endpoint x(x=1~4) IN interrupt, when each USB endpoint x IN interrupt status flag
(INTST0,2,4,6) of the corresponding endpoints of USB function interrupt status register is set to “1”,
an interrupt request occurs. Each flag INTST0, 2, 4, 6 is set to “1” in one of the following cases:
In the endpoint x(x=1~4) OUT interrupt, when each USB endpoint x OUT interrupt status flag
(INTST1,3,5,7) of the corresponding endpoints of USB function interrupt status register is set to “1”,
an interrupt request occurs. When a data is successfully received at the corresponding endpoint,
each flag INTST1, 3, 5, 7 is set to “1”.
In the error interrupt, when the error interrupt status flag (INTST8) of USB function interrupt status
register is set to “1”, an interrupt request occurs. The INTST8 is set to “1” in one of the following
cases:
• The corresponding bit of USB endpoint enable register (USBEPEN: address 028E
• A data is successfully transmitted
• AUTO FLUSH of hardware has been executed or FLUSH bit of corresponding USB endpoint x IN
• The last ACK for control read transfer is destroyed.
• The FORCE_STALL flag of endpoint 0 control and status register (EP0CS) is set to “1”.
• The SETUP_END flag of EP0CS is set to “1”.
• The UNDER_RUN flag of USB endpoint x IN control and status register (EPxICS: addresses 029E
• The OVER_RUN flag of USB endpoint x OUT control and status register (EPxOCS: addresses 02B6
• The FORCE_STALL flag of EPxOCS is set to “1”.
• The DATA_ERR flag of EPxOCS is set to “1”.
Endpoint x(x=1~4) IN Interrupt
Endpoint x(x=1~4) OUT Interrupt
Error Interrupt
(The endpoint is enabled from a disabled state.)
02A4
02BE
control and status register (EPxICS: addresses 029E
“1” while one or two packet data exist in the IN FIFO.
at any one of the IN endpoints that are used for isochronous transfer.)
at any one of the OUT endpoints that are used for isochronous transfer.)
16
16
, 02AA
, 02C6
page 155 of 354
16
16
, 02CE
, 02B0
16
16
) is set to “1”. (Due to delay in reading of data from FIFO, overrun has occurred
) is set to “1”. (Due to delay in writing of data to FIFO, underrun has occurred
16
, 02A4
16
, 02AA
16
, 02B0
16
) being set to
16
2. USB function
) is set to “1”.
16
) and
16
,
16
,

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