m5m51016btp Renesas Electronics Corporation., m5m51016btp Datasheet - Page 290

• Manufacturer Part Number: m5m51016btp
• Description: Renesas 16-bit Single-chip Microcomputer M16c Family / M16c/20 Series
• Manufacturer: Renesas Electronics Corporation.

M30245 Group
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
Operation
Figure 2.16.6. Example of wait mode set-up
2.16.3 Wait Mode Set-Up
Settings and operation for entering wait mode are described here.
(1) Enables the interrupt used for returning from wait mode.
(2) Sets the interrupt enable flag (I flag) to “1”.
(3) Clears the protection and changes the content of the system clock control register.
(4) Executes the WAIT instruction.
(2) Interrupt enable flag (I flag)
( 3 ) C a n c e l i n g p r o t e c t
( 1 ) S e t t i n g i n t e r r u p t t o c a n c e l w a i t m o d e
b 7
( 3 ) C o n t r o l o f C P U c l o c k
b7
( 4 ) W A I T i n s t r u c t i o n
b 7
N o t e 1 : W h e n s w i t c h i n g t h e s y s t e m c l o c k , i t i s n e c e s s a r y t o w a i t f o r t h e o s c i l l a t i o n t o s t a b i l i z e .
N o t e 2 : S e t t h e W A I T p e r i p h e r a l f u n c t i o n c l o c k s t o p b i t t o “ 0 ” w h e n t h e s y s t e m c l o c k s e l e c t b i t i s “ 1 ” .
I n s e r t J M P . B i n s t r u c t i o n b e f o r e t h e W A I T i n s t r u c t i o n a n d a t l e a s t f o u r N O P s a f t e r t h e W A I T i n s t r u c t i o n .
Disable the interrupt not to be used for cancelling wait mode.
0 0 0 0
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I n t e r r u p t c o n t r o l r e g i s t e r
K U P I C
S i R I C ( i = 0 , 2 , 3 )
S 1 3 B C N I C
T A i I C ( i = 0 t o 4 )
E P 0 I C
A D I C
S i T I C ( i = 0 t o 3 )
S U S P I C
R S M I C
S O F I C
V B D I C
U S B F I C
0
b 0
b0
1
b 0
I n t e r r u p t p r i o r i t y l e v e l s e l e c t b i t
Enables writing to system clock control registers 0 and 1(addresses 0006
frequency synthesizer registers (addresses 03DB
R e s e r v e d b i t
Make sure that the interrupt priority
level of the interrupt which is used
to cancel the wait mode is higher
than the processor interrupt priority
(IPL) of the routine where the
WAIT instruction is executed.
R e s e r v e d b i t
Main clock division select bit
1 : Write-enabled
M u s t a l w a y s b e s e t t o “ 0 ”
P r o t e c t r e g i s t e r [ A d d r e s s 0 0 0 A
P R C R
M u s t a l w a y s b e s e t t o “ 0 ”
b 7 b 6
0 0 : No division mode
0 1 : Division by 2 mode
1 0 : Division by 4 mode
1 1 : Division by 16 mode
S y s t e m c l o c k c o n t r o l r e g i s t e r 1
[ A d d r e s s 0 0 0 7
[ A d d r e s s 0 0 4 1
[ A d d r e s s 0 0 4 A
[ A d d r e s s 0 0 4 3
[ A d d r e s s 0 0 5 4
[ A d d r e s s 0 0 4 6
[ A d d r e s s 0 0 4 B
[ A d d r e s s 0 0 5 3
[ A d d r e s s 0 0 5 6
[ A d d r e s s 0 0 5 8
[ A d d r e s s 0 0 5 B
[ A d d r e s s 0 0 5 C
[ A d d r e s s 0 0 5 D
“1”
1 6
] C M 1
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
]
]
, 0 0 4 5
]
, 0 0 5 1
]
]
, 0 0 4 2
]
]
]
]
1 6
1 6
1 6
, 0 0 4 7
, 0 0 4 F
, 0 0 5 5
1 6
]
b 7
1 6
1 6
1 6
Wait mode
, 0 0 5 7
, 0 0 4 D
]
0
1 6
1 6
, 0 0 5 9
]
b 7
16
to 03DF
1 6
]
16
b 0
)
I n t e r r u p t p r i o r i t y l e v e l s e l e c t b i t
Reserved bit
INTiIC(i=0 to 2)
S1RIC
S02BCNIC
Make sure that the interrupt priority level of the
interrupt which is used to cancel the wait mode is
higher than the processor interrupt priority (IPL) of
the routine where the WAIT instruction is executed.
Must always be set to “0”
0 0
16
b 0
and 0007
Reserved bit
WAIT peripheral function clock stop bit (Note 2)
Port X
Main clock (X
Main clock division select bit 0
System clock select bit (Note 1, Note 2)
Must always be set to “0”
0 : Do not stop f
1 : Stop f
0 : I/O port
1 : X
0 : On
1 : Off
0 : CM16 and CM17 valid
1 : Division by 8 mode
0 : X
1 : X
S y s t e m c l o c k c o n t r o l r e g i s t e r 0
[ A d d r e s s 0 0 0 6
CIN
IN
CIN
C
, X
16
select bit
-X
, X
) and
1
OUT
COUT
, f
[Address 005F
[Address 0048
[Address 0049
COUT
8
IN
, f
-X
1 6
32
generation
1
OUT
] C M 0
, f
in wait mode
8
, f
) stop bit
32
in wait mode
16
16
16
]
]
, 0044
16
, 005E
2. Power Control
16
]