m5m51016btp Renesas Electronics Corporation., m5m51016btp Datasheet - Page 213

• Manufacturer Part Number: m5m51016btp
• Description: Renesas 16-bit Single-chip Microcomputer M16c Family / M16c/20 Series
• Manufacturer: Renesas Electronics Corporation.

M30245 Group
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
(4) Interrupt Transfer: Endpoints 1 to 4 Transmit
Interrupt transfer setting has two kinds including the normal interrupt transfer and the rate feedback
interrupt transfer.
When endpoints 1 to 4 IN are used for the normal interrupt transfer, ISO bit and INTPT bit of USB
endpoint x IN control and status register are respectively to “0”.
When the isochronous device has the rate feedback function and endpoints 1 to 4 IN are used for
rate feedback interrupt transfer, not only ISO bit and INTPT bit of USB endpoint x IN control and
status register are respectively set to “0” and to “1” but also double buffer mode enable bit of USB
endpoint x IN FIFO configuration register is set to “0” so that single buffer is enabled.
Also, for initialization of toggle sequence bit in interrupt transfer, set TOGGLE_INIT bit to “1” and
initialize PID to DATA0.
Normal Interrupt Transfer:
Rate Feedback Interrupt Transfer:
Normal Interrupt Transfer:
Setting of Transfer Type
Transmit Data Preparation
Transmit Operation
The endpoint x IN packet data preparation procedure in the normal interrupt transfer is same as the
bulk transfer.
Refer to “ Transmit Data Preparation“ of “(2) Bulk Transfer: Endpoints 1 to 4 Transmit” (Continu-
ous transfer is valid for the bulk transfer only).
In real application, transmit data to the host CPU has to be always prepared. Prepare one transmit
data to the IN FIFO in the following procedure:
For details of the following 1 and 2, refer to the single buffer mode parts in “
Preparation (2, 3)” of “(2) Bulk Transfer: Endpoints 1 to 4 Transmit” (Continuous transfer is valid for
the bulk transfer only).
1: Write one packet data to be transmitted to the IN FIFO. At the time of writing the data, pay
2: Set SET_IN_BUF_RDY bit to “1” after writing of the data to the IN FIFO are completed.
At this time, the IN FIFO state is updated and one packet transmit is prepared. The USB function
control unit transmits this data to the IN token until next transmit data are updated.
The endpoint x IN transmit operation in the normal interrupt transfer is same as the bulk transfer.
Refer to “
attention to the timing so that an IN token is not received from the host. Every time 1-byte data
are written to the IN FIFO, the internal write pointer is automatically incremented by one. Con-
tents of the internal write pointer cannot be read. For transmitting an empty packet (with 0 data
length), do not write data to the IN FIFO.
page 204 of 354
Transmit Operation” of “(2) Bulk Transfer: Endpoints 1 to 4 Transmit”.
Transmit Data
2. USB function