c8051t602 Silicon Laboratories, c8051t602 Datasheet - Page 100

• Manufacturer Part Number: c8051t602
• Description: Mixed Signal Otp Eprom Mcu Family
• Manufacturer: Silicon Laboratories

C8051T600/1/2/3/4/5
All Port pins must be configured as either analog or digital inputs. Any pins to be used as Comparator or
ADC inputs should be configured as an analog inputs. When a pin is configured as an analog input, its
weak pull-up, digital driver, and digital receiver is disabled. This process saves power and reduces noise
on the analog input. Pins configured as digital inputs may still be used by analog peripherals; however this
practice is not recommended.
Additionally, all analog input pins should be configured to be skipped by the Crossbar (accomplished by
setting the associated bits in XBR0). Port input mode is set in the P0MDIN register, where a ‘1’ indicates a
digital input, and a ‘0’ indicates an analog input. All pins default to digital inputs on reset. See SFR Defini-
tion 13.5 for the P0MDIN register details.
The output driver characteristics of the I/O pins are defined using the Port0 Output Mode register
P0MDOUT (see SFR Definition 13.6). Each Port Output driver can be configured as either open drain or
push-pull. This selection is required even for the digital resources selected in the XBRn registers, and is
not automatic. The only exception to this is the SMBus (SDA, SCL) pins, which are configured as open-
drain regardless of the P0MDOUT settings. When the WEAKPUD bit in XBR2 is ‘0’, a weak pull-up is
enabled for all Port I/O configured as open-drain. WEAKPUD does not affect the push-pull Port I/O. Fur-
thermore, the weak pull-up is turned off on an open-drain output that is driving a ‘0’ to avoid unnecessary
power dissipation.
Registers XBR0, XBR1 and XBR2 must be loaded with the appropriate values to select the digital I/O func-
tions required by the design. Setting the XBARE bit in XBR2 to ‘1’ enables the Crossbar. Until the Crossbar
is enabled, the external pins remain as standard digital inputs (output drivers disabled) regardless of the
XBRn Register settings. For given XBRn Register settings, one can determine the I/O pin-out using the
Priority Decode Table; as an alternative, the Configuration Wizard utility of the Silicon Labs IDE software
will determine the Port I/O pin-assignments based on the XBRn Register settings.
100
Bit7:
Bits6–0: XSKP[6:0]: Crossbar Skip Enable Bits
R/W
Bit7
-
UNUSED. Read = 0b; Write = don’t care.
These bits select Port pins to be skipped by the Crossbar Decoder. Port pins used as ana-
log inputs (for ADC or Comparator) or used as special functions (V
lator circuit, CNVSTR input) should be skipped by the Crossbar.
0: Corresponding P0.n pin is not skipped by the Crossbar.
1: Corresponding P0.n pin is skipped by the Crossbar.
XSKP6
SFR Definition 13.1. XBR0: Port I/O Crossbar Register 0
R/W
Bit6
XSKP5
R/W
Bit5
XSKP4
R/W
Bit4
Rev. 0.5
XSKP3
R/W
Bit3
XSKP2
R/W
Bit2
XSKP1
R/W
Bit1
REF
input, external oscil-
XSKP0
R/W
Bit0
SFR Address:
00000000
Reset Value
0xE1