c8051t602 Silicon Laboratories, c8051t602 Datasheet - Page 38
c8051t602
Manufacturer Part Number
c8051t602
Description
Mixed Signal Otp Eprom Mcu Family
Manufacturer
Silicon Laboratories
Datasheet
1.C8051T602.pdf
(168 pages)
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C8051T600/1/2/3/4/5
5.6.3. Settling Time Requirements
A minimum amount of tracking time is required before each conversion can be performed, to allow the
sampling capacitor voltage to settle. This tracking time is determined by the AMUX0 resistance, the ADC0
sampling capacitance, any external source resistance, and the accuracy required for the conversion. Note
that in delayed tracking mode, an additional three SAR clocks are used for tracking at the start of every
conversion. For many applications, these three SAR clocks will meet the minimum tracking time require-
ments, and higher values for the external source impedance will increase the required tracking time.
Figure 5.5 shows the equivalent ADC0 input circuit. The required ADC0 settling time for a given settling
accuracy (SA) may be approximated by Equation 5.1. When measuring the Temperature Sensor output or
V
hold time) requirements.
Where:
SA is the settling accuracy, given as a fraction of an LSB (for example, 0.25 to settle within 1/4 LSB)
t is the required settling time in seconds
R
n is the ADC resolution in bits (10).
38
DD
TOTAL
with respect to GND, R
is the sum of the AMUX0 resistance and any external source resistance.
Equation 5.1. ADC0 Settling Time Requirements
Figure 5.5. ADC0 Equivalent Input Circuits
Note: When the PGA gain is set to 0.5, C
TOTAL
P0.x
t
reduces to R
=
ln
RC
MUX Select
⎛
⎝
Input
------ -
SA
2
= R
n
⎞
⎠
MUX
MUX
×
R
* C
Rev. 0.5
R
MUX
. See Table 5.1 for ADC0 minimum settling time (track/
TOTAL
SAMPLE
= 5k
C
SAMPLE
C
SAMPLE
SAMPLE
= 5pF
= 3pF
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