c8051t602 Silicon Laboratories, c8051t602 Datasheet - Page 18

• Manufacturer Part Number: c8051t602
• Description: Mixed Signal Otp Eprom Mcu Family
• Manufacturer: Silicon Laboratories

C8051T600/1/2/3/4/5
1.2.
The CIP-51 has a standard 8051 program and data address configuration. It includes 256 bytes of data
RAM, with the upper 128 bytes dual-mapped. Indirect addressing accesses the upper 128 bytes of general
purpose RAM, and direct addressing accesses the 128 byte SFR address space. The lower 128 bytes of
RAM are accessible via direct and indirect addressing. The first 32 bytes are addressable as four banks of
general purpose registers, and the next 16 bytes can be byte addressable or bit addressable.
The C8051T600/1 include 8 kB of EPROM program memory, the C8051T602/3 include 4 kB, and the
C8051T604/5 include 2 kB. See Figure 1.4 for the C8051T600/1 system memory map.
1.3.
The C8051T600/1/2/3/4/5 devices include on-chip Silicon Labs 2-Wire (C2) debug circuitry that provides
non-intrusive, full speed, in-circuit debugging of the production part installed in the end application.
Silicon Labs' debugging system supports inspection and modification of memory and registers, break-
points, and single stepping. No additional target RAM, program memory, timers, or communications chan-
nels are required. All the digital and analog peripherals are functional and work correctly while debugging.
All the peripherals (except for the ADC and SMBus) are stalled when the MCU is halted, during single
stepping, or at a breakpoint in order to keep them synchronized.
The C8051F300 MCU can be used to quickly develop code for a system using a device in the C8051T600/
1/2/3/4/5 family. The C8051F300 is an In-System Programmable, Flash-based device that uses the same
pinout as the C8051T600/1/2/3/4/5 devices, and can run code written for the C8051T600/1/2/3/4/5. The
C8051T600DK development kit provides all the hardware and software necessary to develop application
code and perform in-circuit debugging for the C8051T600/1/2/3/4/5 MCUs. The kit includes software with a
developer's studio and debugger, an assembler/linker and evaluation ‘C’ compiler, and the necessary
cables for connection to the target board or the end-system. The development kit includes an SOIC Socket
Daughter Card for programming SOIC devices, samples of the C8051T600-GS, and a C8051F300 Emula-
tion Daughter Card for rapid code development. An AC to DC wall adapter is supplied for powering the
board.
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0x1DFF
0x1E00
0x0000
On-Chip Memory
On-Chip Debug Circuitry and Code Development Options
PROGRAM MEMORY
OTP Memory
RESERVED
Figure 1.4. On-chip Memory Map (C8051T600/1 shown)
8k bytes
0xFF
0x7F
0x2F
0x1F
0x80
0x30
0x20
0x00
Rev. 0.5
(Indirect Addressing
(Direct and Indirect
General Purpose
INTERNAL DATA ADDRESS SPACE
Upper 128 RAM
Bit Addressable
Addressing)
Registers
Only)
DATA MEMORY
(Direct Addressing Only)
Special Function
Lower 128 RAM
(Direct and Indirect
Addressing)
Register's