mc9s08qd4 Freescale Semiconductor, Inc, mc9s08qd4 Datasheet - Page 35

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mc9s08qd4

Manufacturer Part Number
mc9s08qd4
Description
Hcs08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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0x0000
0x0001
0x0002–
0x000B
0x000C
0x000D
0x000E
0x000F
0x0010
0x0011
0x0012
0x0013
0x0014
0x0015
0x0016
4.3
The registers in the MC9S08QD4 series are divided into these groups:
Direct-page registers can be accessed with efficient direct addressing mode instructions. Bit manipulation
instructions can be used to access any bit in any direct-page register.
user-accessible direct-page registers and control bits.
The direct page registers in
the lower byte of the address. Because of this, the lower byte of the address in column one is shown in bold
text. In
and
the right. Cells that are not associated with named bits are shaded. A shaded cell with a 0 indicates this
unused bit always reads as a 0. Shaded cells with dashes indicate unused or reserved bit locations that could
read as 1s or 0s.
Freescale Semiconductor
Address
Table
Because the nonvolatile register locations are flash memory, they must be erased and programmed
like other flash memory locations.
Table 4-3
Direct-page registers are located in the first 96 locations in the memory map; these are accessible
with efficient direct addressing mode instructions.
High-page registers are used much less often, so they are located above 0x1800 in the memory
map. This leaves more room in the direct page for more frequently used registers and RAM.
The nonvolatile register area consists of a block of 16 locations in flash memory at
0xFFB0–0xFFBF. Nonvolatile register locations include:
— NVPROT and NVOPT are loaded into working registers at reset
— An 8-byte backdoor comparison key that optionally allows a user to gain controlled access to
PTAD
PTADD
Reserved
KBISC
KBIPE
KBIES
IRQSC
ADCSC1
ADCSC2
ADCRH
ADCRL
ADCCVH
ADCCVL
ADCCFG
Register Addresses and Bit Assignments
Register Name
4-4, the register names in column two are shown in bold to set them apart from the bit names to
secure memory
and
Table
KBEDG7
KBIPE7
ADACT
ADCV7
ADLPC
COCO
ADR7
Table 4-2
4-4, the whole address in column one is shown in bold. In
Bit 7
0
0
0
0
0
0
Table 4-2. Direct-Page Register Summary
MC9S08QD4 Series MCU Data Sheet, Rev. 3
KBEDG6
IRQPDD
KBIPE6
ADTRG
ADCV6
can use the more efficient direct addressing mode that requires only
ADR6
AIEN
6
0
0
0
0
0
ADIV
KBEDG5
PTADD5
IRQEDG
KBIPE5
ADCV5
PTAD5
ADCO
ACFE
ADR5
5
0
0
0
ADLSMP
PTADD4
KBEDG4
KBIPE4
ACFGT
PTAD4
ADCV4
IRQPE
ADR4
4
0
0
0
KBEDG3
PTADD3
KBIPE3
ADCV3
PTAD3
ADR3
IRQF
Chapter 4 Memory Map and Register Definition
KBF
Table 4-2
3
0
0
MODE
KBEDG2
PTADD2
IRQACK
KBIPE2
KBACK
ADCV2
PTAD2
ADCH
ADR2
is a summary of all
2
0
0
Table
KBEDG1
PTADD1
KBIPE1
ADCV9
ADCV1
PTAD1
IRQIE
ADR9
ADR1
KBIE
1
4-2,
ADICLK
Table
KBEDG0
IRQMOD
PTADD0
KBIMOD
KBIPE0
ADCV8
ADCV0
PTAD0
ADR8
ADR0
Bit 0
4-3,
35

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