msm7630 Oki Semiconductor, msm7630 Datasheet - Page 41
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msm7630
Manufacturer Part Number
msm7630
Description
Universal Speech Processor
Manufacturer
Oki Semiconductor
Datasheet
1.MSM7630.pdf
(95 pages)
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MSM7630
5.1 RST: System Reset
A system reset resets all states under all circumstances.
Type: Asynchronous hardware reset after RST pin level detection.
Vector address: Absolute address 0 (0x00000000).
Conditions: Non-maskable (unconditional)
PL after interrupt transition: 15
5.2 IAE: Instruction Access Exception
An instruction access exception is generated when an instruction is fetched from an undefined
memory space. If the instruction is converted to a NOP by delayed instruction control (x-bit
manipulation), then no exception will be generated.
Type: Instruction-synchronous exception caused by memory access error during instruction fetch.
Vector number/address: Vector number = 1 / VBA+0x010
Conditions: Non-maskable (unconditional). Invalidated by delayed instruction control (x-bit).
Saved address: Address of the instruction that caused the exception.
PL after interrupt transition: 15
5.3 IAIE: Instruction Address Invalid Exception
An instruction address invalid exception is generated when a register indirect branch instruction
attempts an instruction fetch at an address that is not on a word boundary. If the instruction is
converted to a NOP by delayed instruction control (x-bit manipulation), then no exception will be
generated.
Type: Instruction-synchronous exception caused by an illegal JLR or RT instruction.
Vector number/address: Vector number = 2 / VBA+0x020
Conditions: Non-maskable (unconditional). Invalidated by delayed instruction control (x-bit).
Saved address: Address of the instruction that caused the exception.
PL after interrupt transition: 15
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