msm7630 Oki Semiconductor, msm7630 Datasheet - Page 50

• Manufacturer Part Number: msm7630
• Description: Universal Speech Processor
• Manufacturer: Oki Semiconductor

¡ Semiconductor
3.4 SCR: Space Configuration Register
This register sets ROM space, SRAM space, and general device space.
• bit[25] AC: SRAM Parity Check (read/write)
• bit[24] AD: SRAM Dummy Cycle (read/write)
• bit[23:21] ARW: SRAM Read Wait (read/write)
bit
This bit sets parity checking of SRAM space. It will be "0" after reset.
This bit sets whether or not SRAM space may be accessed continuously after ROM space or DRAM
space has been read.
This bit will be "1" after reset.
These bits set the wait count when SRAM space is accessed by a read.
These bits will be "111" after reset.
31
AC = 0
AC = 1
AD = 0
AD = 1
ARW = 000
ARW = 001
ARW = 010
ARW = 011
ARW = 100
ARW = 101
ARW = 110
ARW = 111
26
25
A
C
24
A
D
Ignore parity checks.
Generate a bus error if a parity error is detected.
Continuous access allowed.
Open an interval of at least one clock.
2t access (1 wait)
3t access (2 waits)
4t access (3 waits)
5t access (4 waits)
6t access (5 waits)
8t access (7 waits)
10t access (9 waits)
12t access (11 waits)
23
ARW
21
20
AWW
18 17 16
AS
15 14
0
O
C
13
O
D
12
ORW
10
9
OS
8
D
7 6
S
P
C
S
D
5
X
4
3
WT
2
1
SZ
MSM7630
0
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