msm7630 Oki Semiconductor, msm7630 Datasheet - Page 74
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msm7630
Manufacturer Part Number
msm7630
Description
Universal Speech Processor
Manufacturer
Oki Semiconductor
Datasheet
1.MSM7630.pdf
(95 pages)
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5.2.2 Start-Stop Transmit Operation
1) Verify that the SSTS (Status Register) SOST bit is "1", and then write the data to be transferred to
2) If the MCMD (Modem Command Register) SAEN bit is "0", then setting the SCMD (Command
3) For start-stop transmit operation, a start bit "0" will be output from TXD. Then the data written
4) When SCMD (Command Register) SFBM bit is "0", a parity bit will be output after the SOB data.
5) Finally, one stop bit will be output if the SCMD (Command Register) SSTP bit is "0", or two stop
6) When the next data can be written to the transmit buffer, the SSTS (Status Register) SOST bit will
7) For continuous transfers, after the SSTS (Status Register) SOST bit becomes "1" write new data to
8) If there is no more data to be transmitted, then write "0" to the SCMD (Command Register) STXIE
9) When transfer of the stop bit ends, the transmit operation will end if the SOST bit is "1". If the
the transmit buffer SOB. Next write "0" to SOST to indicate that SOB has valid data.
Register) STEN bit to "1" will start the transfer. If the MCMD SAEN bit is "1", then the transfer will
start when the SCMD STEN bit is "1" and the CTS input is "1".
in SOB will be output LSB first. If SCMD’s SFL bit is "0", then 8 bits of data will be output. If the
SFL bit is "1", then 7 bits will be output.
The parity will be even if the SPTY field is "10", and odd if the SPTY field is "11". If SCMD’s SFBM
bit is "1" and SPTY is "00", then the value set in SCMD’s SFB bit will be output after the SOB data.
If SCMD’s SFBM bit is "0" and the SPTY field is "0", then neither a parity bit nor flag bit will be
output after SOB data.
bits will be output if the SSTP bit is "1". This will end the transfer of one frame of data.
change from "0" to "1". If the SCMD (Command Register) STXIE and SIEN bits are "1" at this time,
then the SSTS STXI bit will become "1" and an interrupt request to the CPU will be generated.
SOB (Transmit Buffer) and write "0" to the SOST bit. This will disable interrupt requests from SIO.
bit. The will disable interrupt requests from SIO.
SCMD's STEIE and SIEN bits are "1" at this time, then the SSTS's STEI bit will become "1" and an
interrupt request to the CPU will be generated. This interrupt can be released by writing "0" to
the SSTS's STEI bit or the SCMD's STEIE or SINT bit.
MSM7630
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