msm7630 Oki Semiconductor, msm7630 Datasheet - Page 77

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msm7630

Manufacturer Part Number
msm7630
Description
Universal Speech Processor
Manufacturer
Oki Semiconductor
Datasheet

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• Output buffer empty interrupts
When PCMD’s POEN bit is "1", writing "0" to the POIE bit will disable output buffer empty interrupts,
and writing "1" will enable them. When the POEN bit is "0", output buffer empty interrupts will be
disabled regardless of the value of the POIE bit.
If output buffer empty interrupts are enabled, then one will be generated whenever the output buffer
is read by an external device.
To release output buffer empty interrupts, write "0" to the status register PSTS’s POST bit, to the
command register PCMD’s POIE bit, or to PCMD’s POEN bit.
3. PIO Registers
These registers control the PIO.
3.1 PIB: PIO Input Buffer
This buffer saves data input from an external device. It will be undefined after reset.
3.2 POB: PIO Output Buffer
This buffer saves data to be output to an external device. It will be undefined after reset.
3.3 PDIR: PIO Direction Register
This register specifies under software control whether each parallel port bit is input or output. It will
be "00000000" after reset.
bit
bit
bit
7
7
7
PDIR
POB
PIB
0
0
0
MSM7630
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