msm7630 Oki Semiconductor, msm7630 Datasheet - Page 52

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msm7630

Manufacturer Part Number
msm7630
Description
Universal Speech Processor
Manufacturer
Oki Semiconductor
Datasheet

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¡ Semiconductor
• bit[12:10] ORW: ROM Read Wait (read/write)
• bit[9:8] OS: ROM Device Size (read/write)
• bit[7] DS: Other Data Setup (read/write)
• bit[6] PC: Other Parity Check (read/ write)
These bits set the wait count when ROM space is accessed by a read.
These bits will be "111" after reset.
These bits set the device size of ROM space.
When this field is "00", attempting to access ROM space will cause an instruction access exception
or data access exception.
This bit sets whether or not the data setup time to the write strobe signal WR is guaranteed during
writes to general device space.
This bit will be "1" after reset.
This bit sets parity checking for general device space. It will be "0" after reset.
This bit will be "0" for the MSM7630.
ORW = 000
ORW = 001
ORW = 010
ORW = 011
ORW = 100
ORW = 101
ORW = 110
ORW = 111
OS = 00
OS = 01
OS = 10
OS = 11
DS = 0
DS = 1
PC = 0
PC = 1
2t access (1 wait)
3t access (2 waits)
4t access (3 waits)
5t access (4 waits)
6t access (5 waits)
8t access (7 waits)
10t access (9 waits)
12t access (11 waits)
No ROM (space is invalid)
8-bit wide device
16-bit wide device
32-bit wide device
Not guaranteed.
Guaranteed.
Ignore parity errors.
Generate a bus error if a parity error is detected.
MSM7630
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