mt90224 Zarlink Semiconductor, mt90224 Datasheet - Page 102
mt90224
Manufacturer Part Number
mt90224
Description
8-port Ima/tc Phy Device
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT90224.pdf
(155 pages)
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Address (Hex):
Direct access
Reset Value (Hex):
Address (Hex):
Synchronized access Set address before the transfer is initiated with the RX External SRAM Control
Reset Value (Hex):
Address (Hex):
Direct access
Reset Value (Hex):
Bit #
15:8
Bit #
15:9
7:0
3:0
15:11
Bit #
10:0
8
7
6
5
4
Type
Type
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
Type
R
R
Unused. Read all 0’s
RX External SRAM Read/Write data register.
Unused. Read all 0’s
Reserved. Write 0 for normal operation.
Reserved. Write 0 for normal operation.
Reserved. Write 0 for normal operation.
Set to 1 to enable uP access to the External SRAM, for test purposes.
Clear to 0 for normal operation.
Reserved. Write 0 for normal operation.
Number of the physical link associated with the value in the RX Delay register. This value
is not valid when reading the Maximum Delay over time.
0x0285
This register contains the delay value (in number of cells) selected by the RX
Delay Select Register. The value always include the current guardband delay.
0004
0x0284 (1 reg)
register
0000
0x0286
This register contains the link number associated with the RX Delay value
Register.
0000
Sign bits (same value as bit 10)
Delay Value.
Table 63 - RX External SRAM Read/Write Data
Table 65 - RX Delay Link Number Register
(1 reg)
(1 reg)
Table 64 - RX Delay Register
Zarlink Semiconductor Inc.
MT90222/3/4
102
Description
Description
Description
Data Sheet
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