mt90224 Zarlink Semiconductor, mt90224 Datasheet - Page 15

• Manufacturer Part Number: mt90224
• Description: 8-port Ima/tc Phy Device
• Manufacturer: Zarlink Semiconductor

MT90222 Pin Description (continued)
2,B12,A12,C13,
AF6,AD6,AF5,A
F3,AD4,AE3,AF
B13,A14,B14,C
A10,C11,D11,B
11,A11,C12,D1
AE7,AD7,AC7,
AE8,AD8,AF7,
E5,AD5,AE4,A
B7,A7,D8,C8,
B8,D9,C9,B9
A9,C10,B10,
AE12,AC12,
AC11,AD11,
AF10,AE10,
14,A15,B15
AF11,AE11,
AD10,AF9,
AE9,AD9
A16,B16
AE21,
Pin #
AF12
AD13
AE13
AD17
U25,
G25,
Y23,
A25,
D15
AC9
L24,
B20
2
sr_cs_1, 0
up_r/w
up_oe
up_irq
Name
sr_we
up_wr
up_cs
[18:0]
[15:0]
up_rd
[11:0]
DSTo
up_d
up_a
DSTi
sr_d
[7:0]
sr_a
[12]
[12]
[8]
[4]
[0]
[8]
[4]
[0]
or
or
I/O
I/O
I/O
O
O
O
O
O
I
I
I
I
I
Static Memory Data Bus. Data Bus to exchange data between the MT90222 and the
external static memory. sr_d[7:0] has internal weak pull-downs.
Static Memory Address Bus. Address bus on the external static memory.
Static Memory Read/Not Write. If low, data is written from the MT90222 to the
memory. If high, data is read from the memory to the MT90222.
Static Memory Chip Select Signal. Active low.
Processor Data Bus. Data Bus to exchange data between the MT90222 and a local
processor.
Processor Address Bus. Used to select the internal registers and memory locations
of the MT90222.
Processor Read/Not Write (Motorola Mode). This is an input signal. If low, data is
written from the processor to the MT90222. If high, data is read from the MT90222 to
the processor.
Processor Not Write (Intel Mode). This is an input signal, active low. If low, data is
written from the processor to the MT90222.
Output enable (Motorola Mode). This is an input signal. This signal should be tied to
GND for Motorola timing mode.
Processor Read (Intel Mode). This is an input signal, active low. If low, data is read
from the MT90222.
Chip Select. This is an active low input signal. If this signal is high, the MT90222
ignores all other signals on its processor bus. If this signal is low, the MT90222
accepts the signals on its processor bus.
Processor Interrupt Request. Open drain signal. If this signal is low, the MT90222
signals to the processor that an interrupt condition is pending inside the MT90222.
Serial TDM Data Output 12, 8, 4 and 0. Serial stream which contains transmit data.
The output is set to high impedance for unused time slots and if the link is not used. It
is aligned with TXCKio and TxSYNCio.
Serial TDM Data Input 12, 8, 4 and 0. Serial stream which contains receive data. It is
aligned with RXCKi and RXSYNCi. These pins have internal weak pull-downs.
Processor Interface Signals
Zarlink Semiconductor Inc.
TDM Interface Signals
MT90222/3/4
15
Description
Data Sheet