cn8237 Mindspeed Technologies, cn8237 Datasheet - Page 229

• Manufacturer Part Number: cn8237
• Description: Atm Oc-12 Servicesar Plus With Xbr Traffic Management
• Manufacturer: Mindspeed Technologies

CN8237
ATM OC-12 ServiceSAR Plus with xBR Traffic Management
8.6.1 Master Control Swap
Figure 8-1. Master Control Swap
28237-DSH-001-C
Transfer
Bus
PCI
Data Structures
in Data Sheet
As Shown
Transfers
Transfer
As One
As Two
64-bit
32-bit
Address 0x40) control byte swapping. Bytes are mapped from PCI address to
local memory address. Byte swapping is performed on both 32-bit and 64-bit
transactions.
8.6 Control Bit by Bit Endian Transfers
Special Status bit 30 control swaps the byte lanes of control words written by
SAR to host memory. Includes SEG/RSM Status Queues, Free Buffer and
Transmit queue read update values, and RSM buffer decriptor next pointer.
See
OR
Bit 29 (SLAVE_SWAP) in the PCI Special Status Register (PCI Config
Figure
Mindspeed Technologies
7
0
8-1.
6
1
5
2
0
4
3
7
5
1
4
3
2
6
2
6
3
4
1
5
3
7
2
5
0
4
1
6
PCI Host [2:0]
0
4
0
7
™
8.6 Control Bit by Bit Endian Transfers
Status Queue Entries
RSM Buffer Descriptor Next
Read Update Pointers
8.0 DMA Coprocessor
8237_144a
8-3