cn8237 Mindspeed Technologies, cn8237 Datasheet - Page 246

• Manufacturer Part Number: cn8237
• Description: Atm Oc-12 Servicesar Plus With Xbr Traffic Management
• Manufacturer: Mindspeed Technologies

9.0 System Interface
9.3 CN8237 Reset
9-2
register 1 [ALARM1;0x04], which is continuously compared to the Clock
register. When a match is detected, an interrupt is generated to the host processor.
The processor can then respond to this interrupt and reload a new value into the
ALARM1 register.
9.3 CN8237 Reset
The CN8237 must be reset by the host processor prior to system initialization for
proper operation. This can be done in one of two ways: by asserting the external
HRST* pin (which is normally connected to the system power-up reset circuitry),
or by setting the GLOBAL_RESET bit in the Configuration register 0
[CONFIG0;0x28]. The HRST* pin must be deasserted and GLOBAL_RESET
must be cleared before beginning the CN8237 initialization process.
One simple real-time alarm is implemented in the CN8237. This is Alarm
Mindspeed Technologies
ATM OC-12 ServiceSAR Plus with xBR Traffic Management
™
28237-DSH-001-C
CN8237