cn8237 Mindspeed Technologies, cn8237 Datasheet - Page 358

• Manufacturer Part Number: cn8237
• Description: Atm Oc-12 Servicesar Plus With Xbr Traffic Management
• Manufacturer: Mindspeed Technologies

16.0 Electrical and Mechanical Specifications
16.1 Timing
Figure 16-9. SAR’s Local Memory Interface
16-10
ADDR/CNTRL/DATA Set-up to
16.1.3.1 Local Memory
Interface Design Details
Step 1 – Calculating the
the SSRAMs
NOTE(S):
Not shown are series terminators located close to the source on all signals.
SAR
Figure 16-9
applies to both the RSM and SEG coprocessor’s Local Memory interfaces.
The memory used is flow-through ZBT synchronous SRAM (Samsung
KM718V847T-8) or equivalent. The capacitive load seen by the SAR is
estimated at 40 pF.
are 32 ohms (12 ma). The PCB trace impedances are approximately 50 ohms. The
series terminators were selected to be 18 ohms so that the SAR driver impedance
matches the board trace impedance.
Calculate the ADDR/CNTRL/DATA set-up to the SSRAM using the SAR’s
absolute maximum signal propagation delay:
NOTE:
CLK
The SAR source driver impedances for Address, xBW#, xRNW and xCLK
The local memory interface design is divided into the four steps that follow.
T – (3/4T + 3.75) = Set-up Time
T equals the clock period
Using a clock frequency of 66.66 MHz, T = 15.0 ns
The Set-up Time will be equal to 0 ns.
The PCB traces are assumed to be of similar length; therefore, signal
propagation delays or Flight Times (FT) will be similar.
Mindspeed Technologies
is a simplified drawing of the SAR’s Local Memory interface. This
ATM OC-12 ServiceSAR Plus with xBR Traffic Management
SSRAM
by_18
(4X)
™
8237_161
28237-DSH-001-C
CN8237