cn8237 Mindspeed Technologies, cn8237 Datasheet - Page 285
cn8237
Manufacturer Part Number
cn8237
Description
Atm Oc-12 Servicesar Plus With Xbr Traffic Management
Manufacturer
Mindspeed Technologies
Datasheet
1.CN8237.pdf
(415 pages)
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CN8237
ATM OC-12 ServiceSAR Plus with xBR Traffic Management
Figure 13-6. Receive Timing in Slave UTOPIA Level 1 Mode
28237-DSH-001-C
RXD/TXPAR
(RXFLAG*)
(RXMARK)
NOTE(S):
(1)
(2)
(3)
RXCLAV
RXSOC
RXCLK
RxClav (RxFlag*) goes inactive when there is room in the receive FIFO buffer for a complete cell.
RxClav (RxFlag*) goes active when there is no longer room in the receive FIFO buffer for another complete cell.
RxEN* need not be inactive when RxClav is active.
RXEN*
(1)
H1
13.7 Slave Level 1 UTOPIA Mode
The slave UTOPIA mode is similar to the UTOPIA mode, except the direction of
the enable signals and FIFO buffer flags are reversed. This allows a switch fabric
or backplane to directly control the physical port. The transmit and receive enable
signals are generated by the physical layer instead of the CN8237. The TxFULL*
signal is changed to the TxEMPTY* signal and is an output of the CN8237. The
RxEMPTY* signal is changed to the RxFULL* signal, and is also an output of
the CN8237. This mode supports only a cell-level handshake protocol.
rising edge of RxCLK when RxEN* is active (see
computed over the RxDATA[15:0] lines is compared to the RxPAR input. If there
is a parity error, the FR_PAR_ERR bit is set in the HOST_ISTAT0 register. Data
is discarded upon a parity error if the RSM_PHALT bit in the RSM_CTRL
register is set to a logic high. If so, the reassembly coprocessor halts upon a parity
error. The RxSOC (RxMARK) signals to the CN8237 the start of cell. The
RxCLAV (RxFLAG*) output is the receive FIFO buffer full signal. When it is
active, the CN8237 cannot accept another cell. The CN8237 sets RxCLAV
(RxFLAG*) inactive when it has room in the receive FIFO buffer for another cell.
The physical device sets RxEN* to a logic low if it can transfer an octet.
H2
Received data is latched from the RxDATA[15:0] and RxPAR lines on the
X
Mindspeed Technologies
H3
***
P44
P45
P46
™
(2)
P47
Figure
P48
13.7 Slave Level 1 UTOPIA Mode
13.0 ATM UTOPIA Interface
13-6). The odd parity
X
(3)
X
H1
13-13
8237_100
H2
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