m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 245
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m37905
Manufacturer Part Number
m37905
Description
Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.M37905.pdf
(565 pages)
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THREE-PHASE WAVEFORM MODE
10.4 Three-phase mode 1
Fig. 10.4.1 Initial setting example for registers relevant to three-phase mode 1 (1)
10-28
Setting of waveform output mode register
Timers A0 through A3 are inactive.
Setting of dead-time timer
Setting of three-phase output data register 0, 1
b7
b7
b7
b7
0
b7
1
1
0 0 0 0
1
0
A value in the range from “00
is set.
0
: It may be either “0” or “1.”
0 0
b0
b0
b0
b0
: It may be either “0” or “1.”
0
b0
Count start register 0
(address 40
Three-phase mode 1
Three-phase output polarity
set buffer (Note)
Waveform output is disabled.
Interrupt request interval set bit
Stops counting in timer A0.
Stops counting in timer A1.
Stops counting in timer A2.
Stops counting in timer A3.
Waveform output mode register
(address A6
Dead-time timer trigger
select bit
Three-phase output data register 0
(address A8
Interrupt validity output select bit
Dead-time timer
(address A7
Clock-source-of-dead-time-timer
select bits
Three-phase output data register 1
(address A9
Released from W-phase output
fixation.
Released from V-phase output
fixation.
Released from U-phase output
fixation.
0 : Every second time
1 : Every forth time
0 : “H” output
1 : “L” output
0 : At each even-numbered
1 : At each odd-numbered
Falling edge of one-shot
pulse
b7 b6
0 0 : f
0 1 : f
1 0 : f
underflow of timer A3
underflow of timer A3
2
2
2
/2
/4
16
16
16
16
16
)
)
)
)
)
7905 Group User’s Manual Rev.1.0
16
” to “FF
16
”
Note: The contents of the three-phase output polarity set buffer
Setting of timer A3 to timer mode
Setting of timer A0/A1/A2/A3 interrupt request to “disabled”
Setting of timers A0 through A2 to one-shot pulse mode
(b15)
(b15)
b7
b7
Internal output for stabilization of output level
Setting of timer A3 carrier wave’s period
Setting of output width of each phase of timers A0
through A2
b7
b7
b7
b7
are reversed once before the output level is stabilized.
Therefore, at this time, be sure to set the reversed level of
the level which the user desires to output.
0
0
1 1
0
(b8)
(b8)
b0
b0
0
Continues to the next page.
0
1
b7
b7
0
1 1 1
0 0
A value in the range from “0000
“FFFF
A value in the range from “0000
“FFFF
1
0
b0
b0
0
0
b0
0
b0
b0
b0
16
16
” is set.
” is set.
Timer A3 mode register
(address 59
Timer A0/A1/A2 mode register
(addresses 56
Timer A0/A1/A2/A3 interrupt
control register
(addresses 75
Starts counting in timer A0.
Starts counting in timer A1.
Starts counting in timer A2.
Starts counting in timer A3.
Count start register 0
(address 40
When not using the TA3
(in other words, the TA3
is used as a programmable I/O
port pin.), be sure to clear this
bit to “0.”
Count source select bits
Timer A0 register
(addresses 47
Timer A1 register
(addresses 49
Timer A2 register
(addresses 4B
Timer A0
(addresses D1
Timer A1
(addresses D3
Timer A2
(addresses D5
Timer A3 register
(addresses 4D
Count source select bits
Interrupt disabled
No Interrupt request
(See Table 7.2.3.)
(See Table 7.2.3.)
1
1
1
16
register
register
register
16
)
16
)
16
16
16
16
16
16
16
16
to 58
to 78
, 46
, 48
, 4A
, D0
, D2
, D4
, 4C
16
16
16
16
16
16
16
16
16
16
16
)
)
)
)
)
)
)
)
)
OUT
” to
” to
OUT
pin
pin
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