m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 281
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m37905
Manufacturer Part Number
m37905
Description
Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.M37905.pdf
(565 pages)
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SERIAL I/O
11.3 Clock synchronous serial I/O mode
Fig. 11.3.3 Write operation of data after transmission start
Fig. 11.3.4 Detect operation of transmit completion
11-26
UART0 transmit/receive control register 1 (Address 35
UART1 transmit/receive control register 1 (Address 3D
UART2 transmit/receive control register 1 (Address B5
Checking state of UARTi transmit buffer register
b7
Checking start of transmission
UART0 transmit interrupt control register (Address 71
UART1 transmit interrupt control register (Address 73
UART2 transmit interrupt control register (Address F1
Checking completion of transmission
UART0 transmit/receive control register 0 (Address 34
UART1 transmit/receive control register 0 (Address 3C
UART2 transmit/receive control register 0 (Address B4
b7
b7
Processing at completion of transmission
Writing of next transmit dat a
UART0 transmit buffer register (Address 32
UART1 transmit buffer register (Address 3A
UART2 transmit buffer register (Address B2
b7
[When not using interrupts]
[When not using interrupts]
b0
1
Transmit buffer empty flag
0: Data is present in transmit buffer register.
1: No data is present in transmit buffer register.
b0
b0
(Writing of next transmit data is possible.)
b0
Interrupt request bit
Transmit register empty flag
0: Transmission is in progress.
1: Transmission is completed.
0: No interrupt requested
1: Interrupt requested
7905 Group User’s Manual Rev.1.0
(Transmission has started.)
b0
Transmit data is set.
16
16
16
16
16
16
16
16
16
)
)
)
)
)
)
)
16
)
)
16
16
)
)
)
Note: This figure shows the bits and registers required
Note:
for processing.
See Figures 11.3.6 and 11.3.7 for the change
of flag state and the occurrence timing of an
interrupt request.
This figure shows the bits and registers required
for processing.
See Figures 11.3.6 and 11.3.7 for the change of
flag state and the occurrence timing of an interrupt
request.
[When using interrupts]
A UARTi transmit interrupt request
occurs when the transmission starts.
A UARTi transmit interrupt request occurs
when the transbission starts (when the
UARTi transmit buffer register becomes
empty).
[When using interrupts]
UARTi transmit interrupt
UARTi transmit interrupt
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