m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 371
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m37905
Manufacturer Part Number
m37905
Description
Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.M37905.pdf
(565 pages)
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STOP AND WAIT MODES
15.2 Block description
Fig. 15.2.4 Structure of particular function select register 1
15-6
15.2.2 Particular function select register 1
Figure 15.2.4 shows the structure of the particular function select register 1.
(1) STP-instruction-execution status bit (bit 0)
(2) WIT-instruction-execution status bit (bit 1)
Particular function select register 1 (Address 63
Notes 1: At power-on reset, this bit becomes “0.” At hardware reset or software reset, this bit retains the value just before reset.
When the microcomputer enters the stop mode, this bit becomes “1,” indicating that the STP instruction
has been executed.
This bit becomes “0” at power-on reset. At hardware reset and software reset, this bit retains the value
immediately before reset. Therefore, this bit is used for the following verification:
• Which of the power-on reset and hardware reset has been used to reset the system?
• Has the hardware reset been used for the stop mode termination?
This bit is cleared to “0” by writing “0” to this bit. Although, even when “1” is written to this bit, this
bit does not change.
At the stop mode termination, be sure to clear this bit to “0” by software.
When the microcomputer enters the wait mode, this bit becomes “1,” indicating that the WIT instruction
has been executed.
This bit becomes “0” at power-on reset. At hardware reset and software reset, this bit retains the value
immediately before reset. Therefore, this bit is used for the following verification:
• Which of the power-on reset and hardware reset has been used to reset the system?
• Has the hardware reset been used for the wait mode termination?
This bit is cleared to “0” by writing “0” to this bit. Although, even when “1” is written to this bit, this
bit does not change.
At the wait mode termination, be sure to clear this bit to “0” by software.
Bit
0
1
2
3
4
5
6
7
2: Even when “1” is written, the bit status will not change.
3: Setting this bit to “1” must be performed just before execution of the WIT instruction. Also, after the wait state is termi-
4: When using timer B2 in the pulse period/pulse width measurement mode, be sure to clear this bit to “0.”
nated, this bit must be cleared to “0” immediately.
STP-instruction-execution
status bit
WIT-instruction-execution
status bit
Fix this bit to “0.”
System clock stop select bit
at WIT
Fix this bit to “0.”
The value is “0” at reading.
Timer B2 clock source select bit
(Valid in event counter mode.)
The value is “0” at reading.
Bit name
(Note 3)
(Note 4)
7905 Group User’s Manual Rev.1.0
0 : External signal input to the TB2
1 : fX
0 : Normal operation.
1 : During execution of WIT instruction
0 : In the wait mode, system clock f
1 : In the wait mode, system clock f
0 : Normal operation.
1 : During execution of STP instruction
32
is counted.
16
)
Function
IN
pin is counted.
sys
sys
is active.
is inactive.
b7 b6 b5 b4 b3 b2 b1 b0
0
(Note 1)
(Note 1)
At reset
0
0
0
0
0
0
0
(Note 2)
(Note 2)
R/W
RW
RW
RW
RW
RW
RW
—
—
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