m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 291

• Manufacturer Part Number: m37905
• Description: Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
• Manufacturer: Renesas Electronics Corporation.

3. When using the CTS
SERIAL I/O
[Precautions for clock synchronous serial I/O mode]
[Precautions for clock synchronous serial I/O mode]
1. A transfer clock is generated by operation of the transmit control circuit. Accordingly, even when performing
2. When an external clock is selected, with the input level at the CLK
4. While the CTS
5. Writing to the UARTi baud rate register (BRGi) must be performed while transmission/reception halts.
6. When an internal clock is selected, do not use the RTS function because the RTS output is undefined.
7. When performing transmission, be sure to clear any of the TxD
11-36
When performing only reception, if any of the TxD
5 at address AC
only reception, the transmit operation (in other words, setting for transmission) must be performed. In this
case, be sure to set as follows. Additionally, in this case, dummy data is output from the TxD
external:
disabled).
• When performing reception, be sure to enable the reception after dummy data is set to the low-order
• At reception, be sure to set the receive enable bit and transmit enable bit to “1” simultaneously.
= “0”) or “L” (the CLK polarity select bit = “1”), be sure to satisfy all of the following three conditions:
<At transmission>
<At reception>
synchronous serial I/O mode, the CTS
to “0” (bits 2, 3, and 5 at address AC
reception.
byte of the UARTi transmit buffer register. Also, be sure to set dummy data at each 1-byte data
Transmit data is written to the UARTi transmit buffer register.
The transmit enable bit is set to “1.”
“L” level is input to the CTS
Dummy data is written to the UARTi transmit buffer register.
The receive enable bit is set to “1.”
The transmit enable bit is set to “1.”
i
/RTS
16
) is set to “1,” the corresponding TxD
2
/RTS
i
separation is selected, the CLK
2
pin, be sure that the D-A
i
pin (when the CTS function selected).
7905 Group User’s Manual Rev.1.0
16
i
/RTS
).
i
separation cannot be selected.
0
/P1
1
output enable bit (bit 1 at address 96
3
i
, TxD
i
pin can be used as a programmable I/O port pin.
pin cannot be used. Accordingly, in the clock
1
/P1
0
/P1
7
and TxD
i
3
pin = “H” (the CLK polarity select bit
, TxD
1
2
/P1
/P8
7
3
, and TxD
switch bits (bits 2, 3 and
2
/P8
16
) = “0” (output
3
i
switch bits
pin to the