m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 360
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m37905
Manufacturer Part Number
m37905
Description
Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.M37905.pdf
(565 pages)
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Fig. 14.1.2 Structure of watchdog timer register
Fig. 14.1.3 Structure of watchdog timer frequency select register
14.1.1 Watchdog timer
Figure 14.1.2 shows the structure of the watchdog timer register.
The watchdog timer is a 12-bit counter where the count source which is selected with the watchdog timer
frequency select bit (bit 0 at address 61
watchdog timer if any of the following conditions is satisfied. An arbitrary value cannot be set to the
watchdog timer.
14.1.2 Watchdog timer frequency select register
Figure 14.1.3 shows the structure of the watchdog timer frequency select register.
(1) Watchdog timer frequency select bit (bit 0)
(2) Watchdog timer clock source select bits at STP termination (bits 7, 6)
When dummy data is written to the watchdog timer register. (See Figure 14.1.2.)
When the most significant bit of watchdog timer becomes “0.”
When the STP instruction is executed. (Refer to section “15.3 Stop mode.”)
At reset
Watchdog timer register (Address 60
Watchdog timer frequency select register
This bit is used to select a count source of the watchdog timer.
These bits are used to select a count source at stop mode termination.
For details of the operation at stop mode termination, refer to section “15.3 Stop mode.”
5 to 1
7 to 0
Bit
Bit
0
6
7
Watchdog timer frequency
select bit
Nothing is assigned.
Watchdog timer clock source
select bits at STP termination
Initializes the watchdog timer.
When dummy data has been written to this register, the watchdog timer’s value is
initialized to “FFF
Bit name
16
” (dummy data: 00
7905 Group User’s Manual Rev.1.0
16
)
16
0 : Wf
1 : Wf
b7 b6
0 0 : fX
0 1 : fX
1 0 : fX
1 1 : fX
) is counted down. A value of “FFF
(Address 61
16
Function
to FF
512
32
32
16
128
64
16
).
16
)
Function
WATCHDOG TIMER
b7 b6 b5 b4 b3 b2 b1 b0
b7
14.1 Block description
16
” is automatically set in the
Undefined
Undefined
At reset
At reset
0
0
0
R/W
R/W
RW
RW
RW
—
—
b0
14-3
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