m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 304

• Manufacturer Part Number: m37905
• Description: Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
• Manufacturer: Renesas Electronics Corporation.

Fig. 11.4.10 Initial setting example for relevant registers when receiving
UART0 transmit/receive mode register (Address 30
UART1 transmit/receive mode register (Address 38
UART2 transmit/receive mode register (Address B0
Serial I/O pin control register (Address AC
b7
UART0 transmit/receive control register 0 (Address 34
UART1 transmit/receive control register 0 (Address 3C
UART2 transmit/receive control register 0 (Address B4
b7
b7
0
0
1
b0
b0
b0
Note 1: The CLK
UART
CTS/RTS enable bit
CTS
CTS
TxD
TxD
CTS
TxD
CTS/RTS function select bit
Selection of clock synchronous serial
I/O mode
Stop bit length select bit
Odd/Even parity select bit
Parity enable bit
Sleep select bit
BRG count source select bits
Internal/External clock select bit
0: CTS
1: CTS
0: CTS
1: CTS
0: Functions as TxD
1: Functions as P1
0: Functions as TxD
1: Functions as P1
0: CTS
1: CTS
0: Functions as TxD
1: Functions as P8
0: CTS function selected
1: RTS function selected
0: CTS/RTS function is enabled.
1: CTS/RTS function is disabled.
0: Reception interrupt
1: Reception error interrupt
0: 1 stop bit
1: 2 stop bits
0: Odd parity
1: Even parity
0: Internal clock
1: External clock
0: Parity is disabled.
1: Parity is enabled.
0: Sleep mode cleared (invalid)
1: Sleep mode selected
1 0 0: UART mode (7 bits)
1 0 1: UART mode (8 bits)
1 1 0: UART mode (9 bits)
b2 b1 b0
Set the same transfer data format
as that of the transmitter side.
b1 b0
0 0: f
0 1: f
1 0: f
1 1: f
0
1
2
0
1
2
2: When performing reception only,
/P1
/P1
/P8
i
/RTS
/RTS
/RTS
7905 Group User’s Manual Rev.1.0
receive interrupt mode select bit
the CTS
(Refer to “[Precaution for clock
asynchronous serial I/O (UART)
mode].”)
if these bits are set to “1,” the
TxD
programmable I/O port pin.
0
0
1
1
2
2
3
7
3
2
16
64
512
/RTS
/RTS
/RTS
/RTS
/RTS
/RTS
switch bit (Note 2)
switch bit (Note 2)
switch bit (Note 2)
0
1
2
16
i
separate select bit
separate select bit
separate select bit
pin can be used as a
)
0
0
1
1
2
2
are used together.
are separated (Note 1).
are used together.
are separated (Note 1).
are used together.
are separated (Note 1).
i
11.4 Clock asynchronous serial I/O (UART) mode
i
/RTS
pin cannot be used when
3
7
3
.
.
.
0
1
2
i
16
16
16
.
.
.
separation is selected.
)
)
)
16
16
16
)
)
)
Reception will start when the start bit (’s
UART0 receive interrupt control register (Address 72
UART1 receive interrupt control register (Address 74
UART2 receive interrupt control register (Address F2
b7
UART1 transmit/receive control register 1 (Address 3D
UART2 transmit/receive control register 1 (Address B5
UART0 transmit/receive control register 1 (Address 35
UART0 baud rate register (BRG0) (Address 31
UART1 baud rate register (BRG1) (Address 39
UART2 baud rate register (BRG2) (Address B1
b7
Port P1 direction register (Address 5
Port P8 direction register (Address 14
falling edge) is detected.
b7
b7
b7
0
b0
Interrupt priority level select bits
When using interrupts, set these bits to
one of levels 1 to 7.
When disabling interrupts, set these bits
to level 0.
1
0
0
b0
Can be set to “00
b0
b0
b0
Transmit enable bit
1: Transmission enabled
Pin RxD
Pin RxD
Pin RxD
16
16
)
)
0
1
2
16
16
16
16
16
16
16
)
)
)
SERIAL I/O
)
)
” to “FF
)
16
16
16
)
)
)
16
”
11-49