m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 370
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m37905
Manufacturer Part Number
m37905
Description
Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.M37905.pdf
(565 pages)
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Fig. 15.2.3 Writing procedure for particular function select register 0
(2) External clock input select bit (bit 1)
When this bit = “0,” the oscillation driver circuit between pins X
mode termination owing to an interrupt occurrence, the watchdog timer is used.
Setting this bit to “1” stops the oscillation driver circuit between pins X
level at pin X
termination owing to an interrupt occurrence, the watchdog timer is not used if the system clock select
bit (bit 5 at address BC
= “1.”
To rewrite this bit, write “0” or “1” just after writing of “55
Note that if an interrupt occurs between writing of “55
may be ignored. When there is a possibility that an interrupt occurs at the above timing, be sure to
read this bit’s contents after writing of “0” or “1,” and verify whether “0” or “1” has correctly been
written or not.
In addition, even when the watchdog timer is disabled by the particular function select register 2
(address 64
(Refer to section “15.3 Stop mode.”)
Writing of “55
Writing to bits 0, 1
16
b7
b7
0
0
), the watchdog timer can be active only at the stop mode termination if this bit = “0.”
OUT
0
1
being “H.” (Refer to section “16.3 Stop of oscillation circuit.”) At the stop mode
0
0
0
1
16
0
0
”
16
0
0
) = “0,” where as the watchdog timer is used if the system clock select bit
1
0
0
b0
b0
7905 Group User’s Manual Rev.1.0
1
STP instruction invalidity select bit
External clock input select bit
Particular function select register 0 (Address 62
Particular function select register 0 (Address 62
0 : STP instruction is valid.
1 : STP instruction is invalid.
0 : Oscillation circuit is active. (Oscillator is connected.)
1 : Oscillation circuit is inactive. (External clock is input.)
Setting completed
Watchdog timer is used at stop mode termination.
When the system clock select bit (bit 5 at address BC
watchdog timer is not used at stop mode termination.
When the system clock select bit = “1,”
watchdog timer is used at stop mode termination.
Note: Bits’ state does not change only
by writing of “55
STOP AND WAIT MODES
16
” and next writing of “0” or “1,” latter writing
16
” to address 62
16
.”
IN
and X
IN
and X
16
16
15.2 Block description
OUT
)
)
16
) = “0,”
is operationg. At the stop
16
OUT
. (See Figure 15.2.3.)
and keeps the output
Next
instruction
15-5
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