PCF8811U/2DA/1 NXP [NXP Semiconductors], PCF8811U/2DA/1 Datasheet - Page 19

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PCF8811U/2DA/1

Manufacturer Part Number
PCF8811U/2DA/1
Description
80 x 128 pixels matrix LCD driver
Manufacturer
NXP [NXP Semiconductors]
Datasheet
NXP Semiconductors
8. Addressing
PCF8811_4
Product data sheet
7.2.5 Display address counter
7.2.6 LCD row and column drivers
The display is generated by reading out the RAM content for 2, 4 or 8 rows
simultaneously, depending on the current selected display size. This content is processed
with the corresponding set of 2, 4 or 8 orthogonal functions and so generates the signals
for switching the pixels in the display on or off according to the RAM content. The value p
defines the number of rows which are simultaneously selected. It is possible to set the p
value for the display sizes 64 and 80 manually to p = 4; see
The display status (all dots on/off and normal/inverse video) is set by the bits DON, DAL
and E in the command display control; see
The PCF8811 contains 80 row and 128 column drivers, which connect the appropriate
LCD bias voltages in sequence to the display in accordance with the data to be displayed.
Data is written in bytes to the RAM matrix of the PCF8811 as shown in
display RAM has a matrix of 80
pointer. The address ranges are: X = 0 to 127 (111 1111), Y = 0 to 9 (1001). The Y
address represents the bank number. The effective X and Y addresses are programmed
in such an order to use the PCF8811 with different display sizes, without additional
loading of the microprocessor. Addresses outside these ranges are not allowed. The icon
row when enabled is always row 79 and therefore located in bank 9.
Rev. 04 — 27 June 2008
128 bits. The columns are addressed by the address
Table
11.
80 x 128 pixels matrix LCD driver
Table
10.
PCF8811
© NXP B.V. 2008. All rights reserved.
Figure
5. The
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