PCF8811U/2DA/1 NXP [NXP Semiconductors], PCF8811U/2DA/1 Datasheet - Page 35

• Manufacturer Part Number: PCF8811U/2DA/1
• Description: 80 x 128 pixels matrix LCD driver
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
PCF8811_4
Product data sheet
Fig 31. Master transmits in Hs-mode to slave receiver; write mode
Sr 0 1 1 1 1
slave address
S
A
1
After the acknowledgement cycle of a write (W), one or more command words will follow
which define the status of the addressed slaves. A command word consists of a control
byte, which defines continuation bit Co and D/C, plus a data byte; see
Table
The last control byte is initiated by bit Co (a cleared MSB). The control and data bytes are
also acknowledged by all addressed slaves on the bus.
Table 9.
A read sequence is shown in
Hs-mode is selected. The PCF8811 will immediately start to output the requested data
until a not-acknowledge is transmitted by the master. Before the read access, the user has
to set the D/C bit to the appropriate value by a preceding write access. The write access
must be terminated by a RESTART condition so that the Hs-mode is not disabled.
After the last control byte, depending on the D/C bit setting, either a series of display data
bytes or command data bytes may follow. If the D/C bit was set to logic 1, these display
bytes are stored in the display RAM at the address specified by the data pointer.
from PCF8811
Bit
Co
D/C
S
A
acknowledge
0
Fig 32. Master receives from slave transmitter (status register is read); read mode
R/W
0 A
9.
Co
Logic state R/W
0
1
0
1
1
D/C
Co and D/C definitions
control byte
from PCF8811
acknowledge
N/A
N/A
0
1
0
1
2n
A
Rev. 04 — 27 June 2008
Sr 0 1 1 1 1
0 bytes
Action
last control byte to be sent; only a stream of data bytes are allowed to
follow; this stream may only be terminated by a STOP or RESTART
condition
another control byte will follow the data byte unless a STOP or
RESTART condition is received
data byte will be decoded and used to set-up the device
data byte will return the status byte
data byte will be stored in the display RAM
RAM read back is not supported
slave address
Figure 32
data byte
S
A
1
from PCF8811
acknowledge
from PCF8811
acknowledge
S
A
0
R/W
and again this sequence follows after the
1 A
A
Co
0
D/C
status information
control byte
1 byte
80 x 128 pixels matrix LCD driver
from PCF8811
not-acknowledge
acknowledge
from master
STOP condition
A
A
MSB . . . . . . . . . . . LSB
P
mgw750
data byte
n
0 bytes
Figure 31
PCF8811
© NXP B.V. 2008. All rights reserved.
from PCF8811
acknowledge
mgw749
A P
and
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