PCF8811U/2DA/1 NXP [NXP Semiconductors], PCF8811U/2DA/1 Datasheet - Page 74

• Manufacturer Part Number: PCF8811U/2DA/1
• Description: 80 x 128 pixels matrix LCD driver
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
Table 40.
[1]
PCF8811_4
Product data sheet
Step Pad
1
2
3
4
5
6
7
9
10
11
12
13
14
15
Repeat steps 5 to 14 for each bit which must be programmed to 1; exit CALMM mode
16
X = value without meaning.
EXT D/C R/W/WR DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
X
X
X
X
X
X
X
X
X
X
X
X
-
-
-
Sequence for filling the shift register; example 2
0
0
0
0
0
0
0
0
0
0
0
0
-
-
-
0
0
0
0
0
0
0
0
0
0
0
0
-
-
-
with a logic 1 in order to program the corresponding OTP cell. If the shift register cell
contains a logic 0, then no action will take place when the programming voltages are
applied.
Once programmed, an OTP cell cannot be de-programmed. An already programmed cell,
i.e. an OTP cell containing a logic 1, must not be re-programmed.
During programming, a substantial current flows in the V
recommended to program only one OTP cell at a time. This is achieved by filling all but
one shift register cells with logic 0.
It should be noted that the programming specification refers to the voltages at the chip
pads, contact resistance must therefore be considered by the user.
An example sequence of commands and data for OTP programming is given in
It is assumed that the PCF8811 has just been reset.
The order for programming cells is not significant. However, NXP Semiconductors
recommends that the seal bit is programmed last. Once this bit has been programmed
and the CALMM mode is exited, it is not possible to re-enter the CALMM mode.
Command byte
1
1
1
1
1
1
1
1
1
1
1
1
-
-
-
1
0
0
0
0
0
0
0
0
0
0
1
-
-
-
X
X
X
X
X
X
X
X
X
1
1
0
-
-
-
X
X
X
X
X
X
X
X
X
0
0
0
Rev. 04 — 27 June 2008
-
-
-
X
X
X
X
X
X
X
X
X
0
1
0
-
-
-
[1]
X
X
X
X
X
X
X
X
X
0
0
0
-
-
-
X
X
X
X
X
X
X
X
X
0
0
1
-
-
-
1
1
0
1
1
1
0
0
0
1
0
0
-
-
-
Action
exit power-save
wait 5 ms for refresh to take effect
re-enter power-down (DON = 0)
enter CALMM mode
shift in data; MMVOPCAL[4] is first bit
MMVOPCAL[3]
MMVOPCAL[2]
MMVOPCAL[1]
MMVOPCAL[0]
MMTC[2]
MMTC[1]
MMTC[0]
seal bit
apply programming voltage at pads
V
apply external reset
OTPPROG
80 x 128 pixels matrix LCD driver
LCDIN
and V
pad. For this reason it is
LCDIN
; see
PCF8811
© NXP B.V. 2008. All rights reserved.
Section 18.1.8
Table
74 of 81
40.