DAC1617D1G0HN IDT [Integrated Device Technology], DAC1617D1G0HN Datasheet - Page 15

• Manufacturer Part Number: DAC1617D1G0HN
• Description: Dual 16-bit DAC, LVDS interface, up to 1 Gsps, x2, x4 and x8 interpolating
• Manufacturer: IDT [Integrated Device Technology]

Integrated Device Technology
DAC1617D1G0 3
Preliminary data sheet
Fig 3.
RESET_N
(optional)
(optional)
SCS_N
SCLK
SDIO
SDO
SPI protocol
R/W
R/W indicates the mode access (see Table 6)
Table 6.
Table 7 shows the number of bytes to be transferred. N1 and N0 indicate the number of
bytes transferred after the instruction byte.
Table 7.
A[4:0] indicates which register is being addressed. If a multiple transfer occurs, this
address concerns the first register. The other registers follow directly in a decreasing
order (see Table 21, Table 35 and Table 53).
The DAC1617D1G0 incorporates more than the 32 SPI registers allowed by the address
value A[4:0]. It uses three SPI register pages (page_00, page_01, and page_0A), each
containing 32 registers. The 32
addressed (00h, 01h or 0Ah).
R/W
0
1
N1
0
0
1
1
N1
N0
Read or Write mode access description
Number of bytes transferred
A4
A3
Description
Write mode operation
Read mode operation
N0
0
1
0
1
A2
Rev. 03 — 2 July 2012
Dual 16-bit DAC: up to 1 Gsps; x2, x4 and x8 interpolating
A1
nd
A0
register of each page indicates which page is currently
D7
D7
Number of bytes transferred
1 byte
2 bytes
3 bytes
4 bytes
D6
D6
D5
D5
D4
D4
DAC1617D1G0
D3
D3
D2
D2
D1
D1
© IDT 2012. All rights reserved.
D0
D0
001aan829
15 of 78