DAC1617D1G0HN IDT [Integrated Device Technology], DAC1617D1G0HN Datasheet - Page 50
DAC1617D1G0HN
Manufacturer Part Number
DAC1617D1G0HN
Description
Dual 16-bit DAC, LVDS interface, up to 1 Gsps, x2, x4 and x8 interpolating
Manufacturer
IDT [Integrated Device Technology]
Datasheet
1.DAC1617D1G0HN.pdf
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Integrated Device Technology
Table 22.
Default values are shown highlighted.
Table 23.
Default values are shown highlighted.
DAC1617D1G0 3
Preliminary data sheet
Bit
7
6
2
1
0
Bit
7
6
5
4 to 2
Symbol
3W_SPI
SPI_RST
CODING
IC_PON
GAP_PON
Symbol
NCO_ON
NCO_LP_SEL
INV_SIN_SEL
MODULATION[2:0]
Register COMMON (address 00h) bit description
Register TXCFG (address 01h) bit description
10.22.4 Page 0 bit definition detailed description
The tables in this section contain detailed descriptions of the page 0 registers.
Access
R/W
R/W
R/W
R/W
R/W
Access
R/W
R/W
R/W
R/W
Rev. 03 — 2 July 2012
Dual 16-bit DAC: up to 1 Gsps; x2, x4 and x8 interpolating
Value
0
1
0
1
0
1
0
1
0
1
Value
0
1
0
1
0
1
000
001
010
011
100
others
Description
serial interface bus type
serial interface reset
coding of input word
IC power control
internal band gap power control
Description
NCO
NCO low-power selection
inverse (sin x) / x function selection
modulation
4-wire SPI
3-wire SPI
no reset
performs a reset on all registers except address 00h
two’s complement coding
unsigned format
all circuits (digital and analog, except SPI) are in
power-down
all circuits (digital and analog, except SPI) are
switched on
band gap is power-down
internal band gap references are switched on
NCO disabled, the NCO phase is reset to 0
NCO enabled
low-power NCO disabled
low-power NCO enabled (frequency and phase
given by the five MSB of the registers 06h and 08h,
respectively)
disable
enable
dual DAC: no modulation
positive upper single sideband upconversion
positive lower single sideband upconversion
negative upper single sideband upconversion
negative lower single sideband upconversion
not defined
DAC1617D1G0
© IDT 2012. All rights reserved.
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