DAC1617D1G0HN IDT [Integrated Device Technology], DAC1617D1G0HN Datasheet - Page 59

• Manufacturer Part Number: DAC1617D1G0HN
• Description: Dual 16-bit DAC, LVDS interface, up to 1 Gsps, x2, x4 and x8 interpolating
• Manufacturer: IDT [Integrated Device Technology]

Integrated Device Technology
Table 42.
Default values are shown highlighted.
Table 43.
Default values are shown highlighted.
Table 44.
Default values are shown highlighted.
DAC1617D1G0 3
Preliminary data sheet
Bit
4 to 0
Bit
6 to 0
Address
09h
Symbol
MDS_OFFSET_DLY[6:0]
Symbol
MDS_ADJDELAY[6:0]
MDS_OFFSET_DLY register (address 07h) bit description
MDS_ADJDELAY register (address 08h) bit description
MDS status registers (address 09h to 0Ah) bit description
Register
MDS_STATUS0
Bit
7
6
5
4
3
2
1
0
Access
R/W
Access
R
Symbol
EARLY
LATE
EQUAL
MDS_LOCK
EARLY_ERROR
LATE_ERROR
EQUAL_FOUND
MDS_ACTIVE
Rev. 03 — 2 July 2012
Dual 16-bit DAC: up to 1 Gsps; x2, x4 and x8 interpolating
Value
-
Value
-
Access Value Description
R
R
R
R
R
R
R
R
Description
delay offset for dataflow (two’s complement [16 to 15]
Description
actual value adjustment delay
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
early signal (sampled) from
early-to-late detector
late signal (sampled) from
early-to-late detector
equal signal (sampled) from
early-to-late detector
result equal-check
adjustment delay maximum value
stops the search
adjustment delay minimum value
stops the search
evaluation logic has detected equal
condition
evaluation logic active
false
true
false
true
false
true
false
true
false
true
false
true
false
true
false
true
DAC1617D1G0
© IDT 2012. All rights reserved.
59 of 78