AD9148BPCZ AD [Analog Devices], AD9148BPCZ Datasheet - Page 6

• Manufacturer Part Number: AD9148BPCZ
• Description: Quad 16-Bit,1 GSPS, TxDAC+ Digital-to-Analog Converter
• Manufacturer: AD [Analog Devices]

AD9148
DIGITAL INPUT DATA TIMING SPECIFICATIONS
Table 3.
Parameter
LATENCY (DACCLK CYCLES)
Table 4. Maximum Rate
Interface Mode
Dual Port Mode
Single Port Mode or Byte Mode
1× Interpolation (With or Without Coarse Modulation)
2× Interpolation (With or Without Coarse Modulation)
4× Interpolation (With or Without Coarse Modulation)
8× Interpolation (With or Without Coarse Modulation)
Inverse Sinc (1× Interpolation)
Inverse Sinc (2× Interpolation)
Inverse Sinc (4× Interpolation)
Inverse Sinc (8× Interpolation)
Fine Modulation
Power–Up Time
PORT A
PORT B
DATA
DATA
DCIA
DCIB
ONE DCI
f
INTERFACE
LATCH
INPUT
LATCH
INPUT
ASSEMBLER
ASSEMBLER
DATA
DATA
INTERFACE
MODE
WRITE PTR A
WRITE PTR B
32
f
620
1200
Figure 3. Defining Maximum Rates
INTERFACE
32
f
Rev. PrA | Page 6 of 73
DATA
FIFO B
FIFO A
32
32
f
310
300
DATA
2×
2×
f
Maximum Rate (MSPS)
HB1
AND DISTRIBUTOR
CLK GENERATOR
DATAPATH
DATAPATH
2×
2×
f
620
600
Min
HB1
f
HB2
Preliminary Technical Data
2×
2×
f
HB3
Typ
f
1000
1000
HB2
TBD
125
254
508
64
10
20
40
80
12
32
32
DAC1
DAC2
DAC3
DAC4
AND
AND
Max
f
DACCLK
DAC
f
1000
1000
HB3
Unit
Cycles
Cycles
Cycles
Cycles
ms
Cycles
Cycles
Cycles
Cycles
Cycles
f
1000
1000
DAC