AD9148BPCZ AD [Analog Devices], AD9148BPCZ Datasheet - Page 60

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AD9148BPCZ

Manufacturer Part Number
AD9148BPCZ
Description
Quad 16-Bit,1 GSPS, TxDAC+ Digital-to-Analog Converter
Manufacturer
AD [Analog Devices]
Datasheet
AD9148
Transmit DAC Output Configurations
The optimum noise and distortion performance of the AD9148
is realized when it is configured for differential operation. The
common-mode error sources of the DAC outputs are reduced
significantly by the common-mode rejection of a transformer
or differential amplifier. These common-mode error sources
include even-order distortion products and noise. The
enhancement in distortion performance becomes more
significant as the frequency content of the reconstructed
waveform increases and/or its amplitude increases. This is due
to the first-order cancellation of various dynamic common-
mode distortion mechanisms, digital feedthrough, and noise.
Figure 76 shows the most basic DAC output circuitry. A pair of
resistors, R
output currents to a differential voltage output, V
the current outputs of the DAC are high impedance, the differential
driving point impedance of the DAC outputs, R
2 × R
The common-mode signal voltage, V
The peak output voltage, V
With this circuit configuration, the single-ended peak voltage is
the same as the peak differential output voltage.
V
V
O
V
. Figure 77 illustrates the output voltage waveforms.
PEAK
PEAK
CM
V
OM
=
= I
O
, are used to convert each of the complementary
I
2
Figure 76. Basic Transmit DAC Output Circuit
FS
FS
× R
×
Figure 77. Voltage Output Waveforms
R
O
O
V
IOUT1_P/IOUT3_P
IOUT1_N/IOUT3_N
IOUT2_N/IOUT4_N
IOUT2_P/IOUT4_P
P
PEAK
V
P
, is calculated by
V
N
CM
R
R
R
R
O
O
O
O
, is calculated by
OUT
V
V
V
V
OUT
IP
IN
QP
QN
, is equal to
V
V
+
+
. Because
OUTI
OUTQ
TIME
Rev. PrA | Page 60 of 73
Transmit DAC Linear Output Signal Swing
The DAC outputs have a linear output compliance voltage range
of ±1 V that must be adhered to in order to achieve optimum
performance. The linear output signal swing is dependent on
the full-scale output current, I
level of the output.
AUXILIARY DAC OPERATION
The AD9148 has four 10-bit auxiliary DACs (AUX1, AUX2,
AUX3, and AUX4). The full-scale output current on these DACs is
derived from the 1.2 V band gap reference and external resistor.
The gain scale from the reference amplifier current, I
auxiliary DAC reference current is 16.67 with the auxiliary DAC
gain set to full-scale. This gives a full-scale current of approximately
2 mA for each auxiliary DAC.
The magnitude of the AUX1 DAC current is controlled via
Bits[1:0], Register 0x33 (MSBs) and Bits[7:0], Register 0x32 (LSBs)
when DAC SPI select = 0 (Bit 4, Register 0x00). The magnitude
of the AUX2 DAC current is controlled via Bits[1:0], Register 0x37
(MSBs) and Bits[7:0], Register 0x36 (LSBs) when DAC SPI select = 0
(Bit 4, Register 0x00). Likewise the magnitudes of AUX3 DAC
current and AUX4 DAC current are controlled via Register 0x33 to
Register 0x32 and Register 0x37 to Register 0x36, respectively
when DAC SPI Select = 1 (Reg.0x00[4]).
The auxiliary DAC structure is shown in Figure 78. There are
two output signals on each auxiliary DAC. One signal is P, and
the other is N. The auxiliary DAC outputs are not differential.
Only one side of the auxiliary DAC (P or N) is active at one
time. The inactive side goes into a high impedance state
(100 kΩ). Control of the P side and N side for the auxiliary
DACs is via Bit 7, Register 0x33 and Bit 7, Register 0x37 (DAC
SPI select is 0 to control AUX1 and AUX2, and DAC SPI select
is 1 to control AUX3 and AUX4).
(SOURCE/SINK)
AUXDAC[9:0]
DIRECTION
Figure 78. Auxiliary DAC Structure
AUXDAC
AUXDAC
Preliminary Technical Data
0mA TO 2mA
(SOURCE)
SIGN
(P/N)
OUTFS
V
B
, and the common mode
0mA TO 2mA
(SINK)
AUX_P
AUX_N
REF
, to the

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