LPC47M140-NC SMSC [SMSC Corporation], LPC47M140-NC Datasheet - Page 107
LPC47M140-NC
Manufacturer Part Number
LPC47M140-NC
Description
128 PIN ENGANCED SUPER I/O CONTROLLER WITH AN LPC INTERFACE AND USB HUB
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.LPC47M140-NC.pdf
(205 pages)
- Current page: 107 of 205
- Download datasheet (2Mb)
Bit 1 of Port 92, the ALT_A20 signal, is used to force nA20M to the CPU low for support of real mode compatible
software. This signal is externally OR’ed with the A20GATE signal from the keyboard controller and CPURST to
control the nA20M input of the CPU. Writing a 0 to bit 1 of the Port 92 Register forces ALT_A20 low. ALT_A20 low
drives nA20M to the CPU low, if A20GATE from the keyboard controller is also low. Writing a 1 to bit 1 of the Port 92
Register forces ALT_A20 high. ALT_A20 high drives nA20M to the CPU high, regardless of the state of A20GATE
from the keyboard controller. Upon reset, this signal is driven low.
SMSC DS – LPC47M14X
Note: When Port 92 is
writes are ignored and
return undefined
P92
8042
Bit 0
P20
Pulse
Gen
14us
~ ~
KRST_GA2
Bit 2
6us
14us
~ ~
Page 107
KRST
nALT_RST
6us
KBDRS
Rev. 03/19/2001
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