LPC47M140-NC SMSC [SMSC Corporation], LPC47M140-NC Datasheet - Page 108

• Manufacturer Part Number: LPC47M140-NC
• Description: 128 PIN ENGANCED SUPER I/O CONTROLLER WITH AN LPC INTERFACE AND USB HUB
• Manufacturer: SMSC [SMSC Corporation]

The implementation of the latches on the keyboard and mouse interrupts is shown below.
The KLATCH and MLATCH bits are located in the KRST_GA20 register, in Logical Device 7 at 0xF0.
These bits are defined as follows:
See the “Configuration” section for a description of this register.
SMSC DS – LPC47M14X
Bit[4]:
Bit[3]:
MLATCH – Mouse Interrupt latch control bit. 0=MINT is the 8042 MINT ANDed with Latched MINT
KLATCH – Keyboard Interrupt latch control bit. 0=KINT is the 8042 KINT ANDed with Latched
(default), 1=MINT is the latched 8042 MINT.
KINT (default), 1=KINT is the latched 8042 KINT.
8042
8042
FIGURE 6 – KEYBOARD LATCH
MINT
KINT
MLATCH Bit
FIGURE 7 – MOUSE LATCH
KLATCH Bit
RD 60
RD 60
VCC
VCC
Page 108
D
D
CLR
CLR
Q
Q
KINT
MINT
new
new
Rev. 03/19/2001