LPC47M140-NC SMSC [SMSC Corporation], LPC47M140-NC Datasheet - Page 35

• Manufacturer Part Number: LPC47M140-NC
• Description: 128 PIN ENGANCED SUPER I/O CONTROLLER WITH AN LPC INTERFACE AND USB HUB
• Manufacturer: SMSC [SMSC Corporation]

sector by generating a 00 pattern and valid CRC. Reads require the host to remove the remaining data so that the result
phase may be entered.
DIGITAL INPUT REGISTER (DIR)
Address 3F7 READ ONLY
This register is read-only in all modes.
PC-AT Mode
BIT 0 - 6 UNDEFINED
The data bus outputs D0 - 6 are read as ‘0’.
BIT 7 DSKCHG
This bit monitors the pin of the same name and reflects the opposite value seen on the disk cable or the value
programmed in the Force Disk Change Register (see Runtime Register at offset 0x1E).
PS/2 Mode
SMSC DS – LPC47M14X
RESET
RESET
COND.
COND.
FIFO THRESHOLD
FIFO THRESHOLD
FIFO THRESHOLD
EXAMPLES
EXAMPLES
EXAMPLES
CHG
DSK
N/A
CHG
DSK
N/A
7
15 bytes
15 bytes
15 bytes
2 bytes
8 bytes
2 bytes
8 bytes
2 bytes
8 bytes
7
1 byte
1 byte
1 byte
N/A
Table 12 – FIFO Service Delay
N/A
6
1
6
0
N/A
N/A
5
1
5
0
1 x 4 µs - 1.5 µs = 2.5 µs
2 x 4 µs - 1.5 µs = 6.5 µs
8 x 4 µs - 1.5 µs = 30.5 µs
15 x 4 µs - 1.5 µs = 58.5 µs
1 x 8 µs - 1.5 µs = 6.5 µs
2 x 8 µs - 1.5 µs = 14.5 µs
8 x 8 µs - 1.5 µs = 62.5 µs
15 x 8 µs - 1.5 µs = 118.5 µs
1 x 16 µs - 1.5 µs = 14.5 µs
2 x 16 µs - 1.5 µs = 30.5 µs
8 x 16 µs - 1.5 µs = 126.5 µs
15 x 16 µs - 1.5 µs = 238.5 µs
MAXIMUM DELAY TO SERVICING AT
MAXIMUM DELAY TO SERVICING AT
MAXIMUM DELAY TO SERVICING AT
Page 35
N/A
N/A
4
1
500 Kbps DATA RATE
4
0
2 Mbps DATA RATE
1 Mbps DATA RATE
N/A
N/A
3
1
3
0
DRATE
SEL1
N/A
N/A
2
2
0
DRATE
SEL0
N/A
N/A
1
1
0
nHIGH
DENS
N/A
1
0
0
0
Rev. 03/19/2001