LPC47M140-NC SMSC [SMSC Corporation], LPC47M140-NC Datasheet - Page 111

• Manufacturer Part Number: LPC47M140-NC
• Description: 128 PIN ENGANCED SUPER I/O CONTROLLER WITH AN LPC INTERFACE AND USB HUB
• Manufacturer: SMSC [SMSC Corporation]

Each GPIO port has a 1-bit data register and an 8-bit configuration control register. The data register for each GPIO
port is represented as a bit in one of the 8-bit GPIO DATA Registers, GP1 to GP6. The bits in these registers reflect
the value of the associated GPIO pin as follows. Pin is an input: The bit is the value of the GPIO pin. Pin is an
output: The value written to the bit goes to the GPIO pin. Latched on read and write. All of the GPIO registers are
located in the PME block see “Run Time Register” section. The GPIO ports with their alternate functions and
configuration state register addresses are listed in Table 54.
Note 1:
SMSC DS – LPC47M14X
PIN #
QFP
N/A
N/A
N/A
100
32
33
34
35
36
37
38
39
41
42
43
45
46
47
50
51
52
54
55
61
62
63
64
17
28
92
94
95
96
97
98
99
48
49
1
2
FUNCTION
Infrared Rx
DEFAULT
Infrared Tx
Reserved
Reserved
Reserved
The GPIO Data and Configuration Registers are located in PME block at the offset shown
from the PME_BLK address.
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
Transmit Serial Data 2
Drive Density Select 0
Drive Density Select 1
Receive Serial Data 2
Data Carrier Detect 2
Date Terminal Ready
Fan Speed Control 2
Fan Speed Control 1
Power Management
Device Disable Reg.
Joystick 1 Button 1
Joystick 1 Button 2
Joystick 2 Button 1
Joystick 2 Button 2
Fan Tachometer 2
Fan Tachometer 1
Request to Send 2
Data Set Ready 2
Joystick 1 X-Axis
Joystick 1 Y-Axis
Joystick 2 X-Axis
Joystick 2 Y-Axis
Keyboard Reset
Ring Indicator 2
Clear to Send 2
System Option
ALT. FUNC. 1
SMI Output
MIDI_OUT
Table 54 – General Purpose I/O Port Assignments
Gate A20
MIDI_IN
Control
GPIO
GPIO
Event
LED
LED
P17
P16
P12
FUNCTION
ALT.
EETI
EETI
EETI
EETI
EETI
2
Page 111
FUNCTION
ALT.
EETI
3
REGISTER
DATA
GP1
GP2
GP3
GP4
GP5
GP6
1
REGISTER
BIT NO.
DATA
7:4
7:2
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
0
1
2
3
4
5
6
7
0
1
REGISTER
Rev. 03/19/2001
OFFSET
(HEX)
100
4B
4C
4D
4E
4F
97
98
99
50