LPC47M140-NC SMSC [SMSC Corporation], LPC47M140-NC Datasheet - Page 158

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LPC47M140-NC

Manufacturer Part Number
LPC47M140-NC
Description
128 PIN ENGANCED SUPER I/O CONTROLLER WITH AN LPC INTERFACE AND USB HUB
Manufacturer
SMSC [SMSC Corporation]
Datasheet
SMSC DS – LPC47M14X
Chip Level
Vendor Defined
Configuration
Address Byte 0
Default
=0x2E (Sysopt=0)
=0x4E (Sysopt=1)
on VCC POR and
HARD RESET
Configuration
Address Byte 1
Default = 0x00
on VCC POR and
HARD RESET
Default = 0x00
on VCC POR,
SOFT RESET and
HARD RESET
Chip Level
Vendor Defined
TEST 6
Default = 0x00, on
VCC POR and
VTR POR
TEST 4
Default = 0x00, on
VCC POR and
VTR POR
TEST 5
Default = 0x00, on
VCC POR and
VTR POR
TEST 1
Default = 0x00, on
VCC POR and
VTR POR
TEST 2
Default = 0x00, on
VCC POR and
VTR POR
REGISTER
ADDRESS
0x2C R/W
0x2D R/W
0x2A R/W
0x2B R/W
0x2E R/W
0x25
0x26
0x27
0x28
0x29
Reserved - Writes are ignored, reads return 0.
Bit[7:1] Configuration Address Bits [7:1]
Bit[0] = 0
See Note 2
Bit[7:0] Configuration Address Bits [15:8]
See Note 2
Bits[7:0] Reserved - Writes are ignored, reads return
0.
Reserved - Writes are ignored, reads return 0.
Test Modes: Reserved for SMSC. Users should not
write to this register, may produce undesired results.
Test Modes: Reserved for SMSC. Users should not
write to this register, may produce undesired results.
Bit[7] Test Mode: Reserved for SMSC.
should not write to this bit, may produce undesired
results.
Bit[6] 8042 Reset:
1 = put the 8042 into reset
0 = take the 8042 out of reset
Bits[5:0] Test Mode: Reserved for SMSC. Users
should not write to this bit, may produce undesired
results.
Test Modes: Reserved for SMSC. Users should not
write to this register, may produce undesired results.
Test Modes: Reserved for SMSC. Users should not
write to this register, may produce undesired results.
Page 158
DESCRIPTION
Users
STATE
C
C
C
C
C
C
Rev. 03/19/2001

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